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Volumn , Issue , 2004, Pages 725-730

Temporal floorplanning using 3D-subTCG

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; CONSTRAINT THEORY; GRAPH THEORY; INTERFACES (COMPUTER); LOGIC DESIGN; OPTICAL INTERCONNECTS; TOPOLOGY;

EID: 2442467801     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (43)

References (20)
  • 3
    • 0033891806 scopus 로고    scopus 로고
    • Fast template placement for reconfigurable computing systems
    • Mar.
    • K. Bazargan, R. Kastner, and M. Sarrafzadeh, "Fast Template Placement for Reconfigurable Computing Systems," IEEE Design & Test of Computers, vol.17, no. 1, pp. 68-83, Mar. 2000.
    • (2000) IEEE Design & Test of Computers , vol.17 , Issue.1 , pp. 68-83
    • Bazargan, K.1    Kastner, R.2    Sarrafzadeh, M.3
  • 6
    • 0021789009 scopus 로고
    • An exact two-dimensional non-guillotine cutting stock tree search procedure
    • J. E. Beasley, "An Exact Two-Dimensional Non-Guillotine Cutting Stock Tree Search Procedure," Operations Research, vol.33, no. 1, pp. 49-64, 1985.
    • (1985) Operations Research , vol.33 , Issue.1 , pp. 49-64
    • Beasley, J.E.1
  • 7
    • 0347117076 scopus 로고    scopus 로고
    • Optimal FPGA module placement with temporal precedence constraints
    • Mar.
    • S. P. Fekete, E. Köhler, and J. Teich, "Optimal FPGA Module Placement with Temporal Precedence Constraints," Proc. DATE, pp. 658-665, Mar. 2001.
    • (2001) Proc. DATE , pp. 658-665
    • Fekete, S.P.1    Köhler, E.2    Teich, J.3
  • 8
    • 0009357813 scopus 로고    scopus 로고
    • On more-dimensional packing III: Exact algorithms
    • S. P. Fekete, and J. Schepers, "On more-dimensional packing III: Exact Algorithms," ZPR Technical Report 97-290 1997.
    • (1997) ZPR Technical Report , vol.97 , Issue.290
    • Fekete, S.P.1    Schepers, J.2
  • 10
    • 0000950606 scopus 로고    scopus 로고
    • The roles of FPGAs in reprogrammable systems
    • Apr.
    • S. Hauck, "The Roles of FPGAs in Reprogrammable Systems," Proc. of the IEEE, vol.86, no. 4. pp. 615-639, Apr. 1998.
    • (1998) Proc. of the IEEE , vol.86 , Issue.4 , pp. 615-639
    • Hauck, S.1
  • 12
    • 26444479778 scopus 로고
    • Optimization by simulated annealing
    • May
    • S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, "Optimization by Simulated Annealing," Science, vol. 220, no. 4598, pp.671-680, May, 1983.
    • (1983) Science , vol.220 , Issue.4598 , pp. 671-680
    • Kirkpatrick, S.1    Gelatt, C.D.2    Vecchi, M.P.3
  • 15
    • 0034855935 scopus 로고    scopus 로고
    • TCG: A transitive closure graph-based representation for non-slicing floorplans
    • June
    • J.-M. Lin and Y.-W Chang, "TCG: A Transitive Closure Graph-Based Representation for Non-Slicing Floorplans," Proc. DAC, pp. 764-769, June 2001.
    • (2001) Proc. DAC , pp. 764-769
    • Lin, J.-M.1    Chang, Y.-W.2
  • 17
    • 2442502393 scopus 로고    scopus 로고
    • Compile-time optimization of dynamic hardware reconfigurations
    • June
    • J. Teich, S. P. Fekete, and J. Schepers, "Compile-Time Optimization of Dynamic Hardware Reconfigurations," Proc PDPTA, pp. 1097-1103, June 1999.
    • (1999) Proc PDPTA , pp. 1097-1103
    • Teich, J.1    Fekete, S.P.2    Schepers, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.