Fully integrated standard cell digital PLL

Electronics Letters

Volumn 37, Issue 4, 2001, Pages 211-212

  Olsson, T ^a   Nilsson, P ^a  

^a LUND UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; LOGIC GATES; MULTIPLYING CIRCUITS; OSCILLATORS (ELECTRONIC); TIMING CIRCUITS;

CLOCK MULTIPLYING CIRCUIT; NUMERICALLY CONTROLLED OSCILLATOR; STANDARD CELL LIBRARY; SUPPLY VOLTAGE;

PHASE LOCKED LOOPS;

EID: 6644224989     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20010160     Document Type: Article

References (3)

1. NILSSON, P., and TORKELSON, M.: 'A monolitic digital clock-generator for on-chip clocking of custom DSPs', IEEE J. Solid-State Circuits, 1996, 31, (5), pp. 700-706
2. OLSSON, T., NILSSON, P., MEINCKE, T., HEMANI, A., and TORKELSON, M.: 'A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs'. Proc. ISCAS'2000, Geneva, May 2000
3. BEST, R.E.: 'Phase-locked loops' (McGraw-Hill, 1984)