Void free processing of flip chip on board assemblies using no-flow underfills

Proceedings of the International Symposium and Exhibition on Advanced Packaging Materials Processes, Properties and Interfaces

Volumn 9, Issue , 2004, Pages 272-281

  Colella, Michael ^a   Baldwin, Daniel ^b  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b ENGENT Inc   (United States)

Author keywords

Area array; Electronics packaging; Flip chip; No flow underfill; Process optimization; Void free

Indexed keywords

AREA ARRAY; NO FILL UNDERFILL; PROCESS OPTIMIZATION; VOID FREE;

ELECTRIC CURRENTS; ELECTRONICS PACKAGING; MICROPROCESSOR CHIPS; MOISTURE; OPTIMIZATION; PRINTED CIRCUIT BOARDS; SOLDERED JOINTS; SOLVENTS; THERMAL EXPANSION;

FLIP CHIP DEVICES;

EID: 2442419974     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. John H. Lau, Flip Chip Technologies, McGraw-Hill, 1996.
2. Ryan Thorpe and Daniel Baldwin Ph.D., "High Throughput Flip Chip Processing and Reliability Analysis Using No-Flow Underfills", Electronic Components and Technology Conference, 1999
3. D. Gamota and C. Melton, "Reflowable material systems to integrate the reflow and encapsulant dispensing process for flip chip on board assemblies", Proc. Int. Conf. Electron. Assent. Mater., Atlanta, GA, 1996.
4. D. Gamota and C. Melton, "Materials to integrate the solder reflow and underfill encapsulation process for flip chip on board assembly", IEEE Trans. Comp., Packag., Manufact. Technol. C, Vol. 21, pp. 57-65, Jan. 1998.
5. Ryan Thorpe, Daniel F. Baldwin, Brian Smith, and Lawrence McGovern, "Yield Analysis and Process Modeling of Low Cost, High Throughput Flip Chip Assembly Based on No-Flow Underfills" IEEE Transactions on Electronics Packaging Manufacturing, Vol. 24, No. 2, April 2001
6. David Milner, "High throughput flip chip assembly process application and assessment using no-flow underfills" MSME Thesis, School of Mechanical Engineering, Georgia Tech, Atlanta, GA, 2001
7. A. Shubert, et al., "Experimental and Numerical Reliability Investigations of FCOB Assemblies with Process-induced Defects", Electronic Components and Technology Conference, 2000, pp. 624-632
8. Tie Wang, T.H. Chew, Colin Lum, Y.X. Chew, P. Miao and L. Foo, "Assessment of Flip Chip Assembly and Reliability via Reflowable Underfill", Electronic Components and Technology Conference, 2001
9. Theodoras Lazarakis, "Processing of no-flow fluxing underfills for flip chip assembly" MSME Thesis, School of Mechanical Engineering, Georgia Tech, Atlanta, GA, 2002
10. Pascarella, N., "Compression Flow Modeling of Underfill Encapsulants for Low Cost Flip Chip Assembly'", IEEE Transactions on Components, Packaging, and Manufacturing technology, Vol. 21, No. 4, 1998
11. nd Electronics Packaging Technology Conference , 1998, pp 264-8
12. Michael Colella "Evaluation, optimization, and reliability, of no-flow underfill process" MSME Thesis, School of Mechanical Engineering, Georgia Tech, Atlanta, GA, 2004