Compression flow modeling of underfill encapsulants for low cost flip-chip assembly

IEEE transactions on components, packaging and manufacturing technology. Part C. Manufacturing

Volumn 21, Issue 4, 1998, Pages 325-335

  Pascarella, Nathan W ^a   Baldwin, Daniel F ^a  

^a TERADYNE INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPRESSIBLE FLOW; COMPUTER SIMULATION; COST EFFECTIVENESS; DEPOSITION; ELECTRIC NETWORK TOPOLOGY; ENCAPSULATION; FLIP CHIP DEVICES; PROCESS ENGINEERING; SUBSTRATES;

DIRECT CHIP ATTACH (DCA); FLIP-CHIP ON BOARD (FCOB);

ELECTRONICS PACKAGING;

EID: 0032184182     PISSN: 10834400     EISSN: None     Source Type: None    
DOI: 10.1109/TCPMC.1998.7102531     Document Type: Article

References (9)