Clock period minimization method of semi-synchronous circuits by delay insertion

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E88-A, Issue 4, 2005, Pages 892-898

  Kohira, Yukihide ^a   Takahashi, Atsushi ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Clock period minimization; Delay insertion; Delay demand; Delay slack; Semi synchronous circuit

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; CONSTRAINT THEORY; DELAY CIRCUITS; ELECTRIC CLOCKS;

CLOCK PERIOD MINIMIZATION; DELAY INSERTION; DELAY-DEMAND; DELAY-SLACK; SEMI-SYNCHRONOUS CIRCUITS;

CIRCUIT THEORY;

EID: 24144472323     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: 10.1093/ietfec/e88-a.4.892     Document Type: Conference Paper

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