Object-oriented embedded system development based on synthesis and reuse of OO-ASIPs

Journal of Universal Computer Science

Volumn 10, Issue 9, 2004, Pages 1123-1155

  Goudarzi, Maziar ^a,b   Hessabi, Shaahin ^a   Mycroft, Alan ^b  

^a SHARIF UNIVERSITY OF TECHNOLOGY   (Iran)

^b UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

Application specific instruction processors; Embedded system design; Hardware software synthesis; High level synthesis; Object oriented system design

Indexed keywords

EID: 23844506431     PISSN: 0958695X     EISSN: 09486968     Source Type: Journal    
DOI: None     Document Type: Review

References (28)

1. [Ashenden et al. 97] Ashenden, P.J., Wilsey, P.A., Martin, D.E.: "SUAVE: painless extension for an object-oriented VHDL"; Proc. VHDL International Users Forum (VIUF, Fall Conference), (1997).
2. [August et al. 02] August, D.I., Keutzer, K., Malik, S., Newton, A.R.: "A disciplined approach to the development of platform architectures"; Microelectronics Journal, Elsevier, (2002).
3. [Benini and DeMicheli 02] Benini, L., DeMicheli, G.: "Networks on chips: a new SoC paradigm"; IEEE Computer, 35, 1 (2002), 70-78.
4. [Booch 94] Booch, G.: "Object-oriented analysis and design with applications (2nd edition)"; Addison-Wesley, (1994).
5. [Cooling 03] Cooling, N.: "UML and its role in real-time embedded systems design"; IEE one-day seminar on Developing Embedded Real-Time Systems, IEE Embedded and Real-Time Systems Professional Network, London (2003).
6. [Goudarzi et al. 03] Goudarzi, M., Hessabi, S., Mycroft, A.: "Object-oriented ASIP design and synthesis"; Proc. Forum on specification & Design Languages (FDL'03), Frankfurt (2003).
7. [Goudarzi et al. 04] Goudarzi, M., Hessabi, S., Mycroft, A.: "Overhead-free polymorphism in network-on-chip implementation of object-oriented models"; Proc. Design Automation and Test in Europe (DATE'04), Paris (2004).
8. [Grimpe et al. 02] Grimpe, E., Timmermann, B., Fandrey, T., Biniasch, R., Oppenheimer F.: "SystemC object-oriented extensions and synthesis features"; Proc. Forum on specification & Design Languages (FDL'02), (2002).
9. [ITRS 01] International Technology Roadmap for Semiconductors (ITR.S)-Design, http://public.itrs.net/Files/2002Update/2001ITRS/Design.pdf, (2001).
10. [Keutzer et al. 02] Keutzer, K., Malik, S., Newton, A. R.: "From ASIC to ASIP: the next design discontinuity"; Proc. Int'l Conference on Computer Design (ICCD'02), (2002).
11. [Kuhn et al. 01] Kuhn, T., Oppold, T., Winterholer, M., Rosenstiel, W., Edwards, M., Kashai, Y.: "A framework for object oriented hardware specification, verification, and synthesis"; Proc. Design Automation Conference (DAC'01), (2001).
12. [Lee and Tepfenhart 97] Lee, R.C., Tepfenhart, W.M.: "UML and C++: A practical guide to object-oriented development"; Prentice-Hall, (1997).
13. [MESCAL 03] The MESCAL Project: Modern Embedded Systems, Compilers, Architectures, and Languages, http://www.gigascale.org/mescal/
14. [OASE 03] The OASE Project: Objektorientierter hArdware/Software Entwurf, http://www-ti.informatik.uni-tuebingen.de/~oase/
15. [ODETTE 03] The ODETTE Project: Object-oriented co-DEsign and functional Test Techniques, http://odette.offis.de
16. [ODYSSEY 03] The ODYSSEY Project: Object-oriented Design and sYntheSiS of Embedded Systems, http://ce.sharif.edu/~odyssey/
17. [Parvataneni et al. 03] Parvataneni, T., Nanetti, G., Holgate, C., Eland, H., Onions, P., Wray, F.: "Object-orientated heterogeneous multiprocessor platform", European and US patent application (GB2381336), http://12.espacenet.com/espacenet/viewer?PN=GB2381336, (2003).
18. [Parvataneni and Nanetti 03] Parvataneni, T., Nanetti, G.: Private communication in The Computer Laboratory, University of Cambridge, June 20th, (2003).
19. [Radetzki 00] Radetzki, M.: "Synthesis of digital circuits from object-oriented specifications"; PhD Thesis, University of Oldenburg, (2000).
20. [Schulz-Key et al. 04] Schulz-Key, C., Winterholer, M., Schweizer, T., Kuhn, T., Rosenstiel, W.: "Object-oriented modeling and synthesis of SystemC specifications"; Proc.the Asia South Pacific Design Automation Conference (ASPDAC'04), Yokohama (2004), 238-243.
21. [Schumacher and Nebel 95] Schumacher, G., Nebel, W.: "Inheritance concept for signals in object-oriented extensions to VHDL"; Proc. EURO-DAC with EURO-VHDL, (1995).
22. [Sgroi et al. 00] Sgroi, M., Lavagno, L., Sangiovanni-Vincentelli, A.: "Formal models for embedded system design"; IEEE Design & Test of Computers, 17, 2 (2000), 14-27.
23. [SystemC 04] The SystemC Initiative, http://www.systemc.org
24. [SystemVerilog 04] The SystemVerilog Homepage, http://www.systemverilog. org
25. [Tsai et al. 02] Tsai, M., Kulkarni, C., Sauer, C., Shah, N., Keutzer, K.: "A benchmarking methodology for network processors"; 1st Network Processor Workshop, Proc. Int'l Symposium on High Performance Computer Architecture (HPCA), Boston, MA (2002).
26. [Wolf 96] Wolf, W.: "Object-oriented co-synthesis of distributed embedded systems"; ACM Transactions on Design Automation of Electronic Systems (TODAES), (1996).
27. [Wolf 01] Wolf, W.: "Computers as components: principles of embedded computing system design"; Morgan Kaufmann Publishers, (2001).
28. [Young et al. 98] Young, J.S., MacDonald, J., Shilman, M., Tabbara, A., Hilfinger, P., Newton, A.R.: "Design and specification of embedded systems in Java using successive, formal refinement"; Proc. Design Automation Conference (DAC'98), (1998).