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Volumn 17, Issue , 2004, Pages 381-389
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A 800 MHz system-on-chip for wireless infrastructure applications
a a a a a a a a a a a a a a a a a a a a more.. |
Author keywords
[No Author keywords available]
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Indexed keywords
CPU;
FORWARD ERROR CORRECTION (FEC) ALGORITHM;
PROGRAMMABLE HARDWARE COPROCESSORS;
SYSTEM-ON-CHIP (SOS);
ALGORITHMS;
BANDWIDTH;
BROADBAND NETWORKS;
CACHE MEMORY;
CHEMICAL MECHANICAL POLISHING;
CMOS INTEGRATED CIRCUITS;
DATA STORAGE EQUIPMENT;
DIGITAL SIGNAL PROCESSING;
ERROR CORRECTION;
METALLIZING;
PROGRAM PROCESSORS;
WIRELESS TELECOMMUNICATION SYSTEMS;
MICROPROCESSOR CHIPS;
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EID: 2342519356
PISSN: 10639667
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (2)
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References (9)
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