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Volumn 23, Issue 4, 2004, Pages 498-508

Equivalent Waveform Propagation for Static Timing Analysis

Author keywords

Crosstalk noise; Inductance; Resistive shielding; Slope propagation; Static timing analysis (sta); Waveform diversity

Indexed keywords

CROSSTALK; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; ELECTRIC SHIELDING; INDUCTANCE; SPURIOUS SIGNAL NOISE; TRANSIENTS; WAVE PROPAGATION; WAVEFORM ANALYSIS;

EID: 2342432242     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.825858     Document Type: Conference Paper
Times cited : (15)

References (15)
  • 3
    • 0030141612 scopus 로고    scopus 로고
    • Performance computation for precharacterized CMOS gates with RC-loads
    • May
    • F. Dartu, N. M. Menezes, and L. T. Pileggi, "Performance computation for precharacterized CMOS gates with RC-loads," IEEE Trans. Computer-Aided Design, vol. 15, pp. 544-553, May 1996.
    • (1996) IEEE Trans. Computer-aided Design , vol.15 , pp. 544-553
    • Dartu, F.1    Menezes, N.M.2    Pileggi, L.T.3
  • 5
    • 0019896149 scopus 로고
    • Timing analysis of computer hardware
    • R. B. Hitchcock, G. L. Smith, and D. D. Cheng, "Timing analysis of computer hardware," IBM J. Res. Develop., vol. 26, no. 1, pp. 100-105, 1982.
    • (1982) IBM J. Res. Develop. , vol.26 , Issue.1 , pp. 100-105
    • Hitchcock, R.B.1    Smith, G.L.2    Cheng, D.D.3
  • 9
    • 0346869295 scopus 로고    scopus 로고
    • Modeling signal waveshapes for empirical CMOS gate delay models
    • F. Dartu and L. T. Pileggi, "Modeling signal waveshapes for empirical CMOS gate delay models," in Proc. PATMOS, 1996, pp. 57-66.
    • (1996) Proc. PATMOS , pp. 57-66
    • Dartu, F.1    Pileggi, L.T.2
  • 11
    • 0024144420 scopus 로고
    • An accurate and efficient gate level delay calculator for MOS circuits
    • F. Chang, C. Chen, and P.Prasad Subramaniam, "An accurate and efficient gate level delay calculator for MOS circuits," in Proc. Design Automation Conf., 1988, pp. 282-287.
    • (1988) Proc. Design Automation Conf. , pp. 282-287
    • Chang, F.1    Chen, C.2    Subramaniam, P.P.3
  • 13
    • 0346869293 scopus 로고
    • Modeling the driving-point characteristic of resistive interconnect for accurate delay estimation
    • P. R. O'Brien and T. L. Savarino, "Modeling the driving-point characteristic of resistive interconnect for accurate delay estimation," in Proc. Int. Conf. Computer-Aided Design, 1992, pp. 19-25.
    • (1992) Proc. Int. Conf. Computer-aided Design , pp. 19-25
    • O'Brien, P.R.1    Savarino, T.L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.