An on-chip vertical solenoid inductor design for multigigahertz CMOS RFIC

IEEE Transactions on Microwave Theory and Techniques

Volumn 53, Issue 6 I, 2005, Pages 1883-1889

  Tsui, Hau Yiu ^a,b   Lau, Jack ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b Supertex Ltd   (Hong Kong)

Author keywords

CMOS analog integrated circuits; Inductors; Quality factor (QF)

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUITS; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; SOLENOIDS;

CMOS ANALOG INTEGRATED CIRCUITS; FREQUENCY TUNING; QUALITY FACTOR (QF); SELF-RESONANT FREQUENCY (SRF);

ELECTRIC INDUCTORS;

EID: 23244449667     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2005.848090     Document Type: Article

References (23)

1. T. H. Lee and S. S. Wong, "CMOS RF integrated circuits at 5 GHz and beyond," Proc. IEEE, vol. 88, no. 10, pp. 1560-1571, Oct. 2000.
2. J. N. Burghartz, M. Hargrove, C. S. Webster, R. A. Groves, M. Keene, K. A. Jenkins, R. Logan, and E. Nowak, "RF potential of a 0.18-μm CMOS logic device technology," IEEE Trans. Electron Devices, vol. 47, no. 4, pp. 864-870, Apr. 2000.
3. max realized at 0.18 μm gate length in an industrial RF-CMOS technology," in IEEE Int. Electron Devices Meeting, Dec. 2001, pp. 10.4.1-10.4.4.
4. C. P. Yue and S. S. Wong, "On-chip spiral inductors with patterned ground shields for Si-based RF IC's," IEEE J. Solid-State Circuits, vol. 33, no. 5, pp. 743-752, May 1998.
5. J. Craninckx and M. Steyaert, "A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors," IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 736-744, May 1997.
6. J. Y.-C. Chang, A. A. Abidi, and M. Gaitan, "Large suspended inductors on silicon and their use in a 2-μm CMOS RF amplifier," IEEE Electron Device Lett., vol. 14, no. 5, pp. 246-248, May 1993.
7. H. Lakdawala, X. Zhu, H. Luo, S. Santhanam, L. R. Carley, and G. K. Fedder, "Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process," IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 394-403, Mar. 2002.
8. N. P. Pham, P. M. Sarro, K. T. Ng, and J. N. Burghartz, "IC-compatible two-level bulk micromachining process module for RF silicon technology," IEEE Trans. Electron Devices, vol. 48, no. 8, pp. 1756-1764, Aug. 2001.
9. B. Kleveland, T. H. Lee, and S. S. Wong, "50-GHz interconnect design in standard silicon technology," in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 1998, pp. 1913-1916.
10. B. Kleveland, C. H. Diaz, D. Vock, L. Madden, T. H. Lee, and S. S. Wong, "Monolithic CMOS distributed amplifier and oscillator," in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 1999, pp. 70-71.
11. J. N. Burghartz, M. Soyuer, K. A. Jenkins, and M. D. Hulvey, "High-Q inductors in standard silicon interconnect technology and its application to an integrated RF power amplifier," in IEEE Int. Electron Devices Meeting, Dec. 1995, pp. 1015-1018.
12. J. Burghartz, K. Jenkins, and M. Soyuer, "Multilevel-spiral inductors using VLSI interconnect technology," IEEE Electron Device Lett., vol. 17, no. 9, pp. 428-430, Sep. 1996.
13. A. Zolfaghari, A. Chan, and B. Razavi, "Stacked inductors and transformers in CMOS technology," IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
14. C.-C. Tang, C.-H. Wu, and S.-I. Liu, "Miniature 3-D inductors in standard CMOS process," IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 471-480, Apr. 2002.
15. S. Ramo, J. R. Whinnery, and T. V. Duzer, Fields and Waves in Communication Electronics. New York: Wiley, 1984, pp. 191-191.
16. H. Y. Tsui and J. Lau, "Experimental results and die area efficient self-shielded on-chip vertical solenoid inductors for multiGHz CMOS RFIC," in IEEE Radio Frequency Integrated Circuits Symp., Jun. 2003, pp. 243-246.
17. D. C. Edelstein and J. N. Burghartz, "Spiral and solenoidal inductor structures on silicon using Cu-damascene interconnects," in Proc. IEEE Int. Interconnect Technology Conf., Jun. 1998, pp. 18-20.
18. J.-B. Yoon, B.-K. Kim, C.-H. Han, E. Yoon, and C.-K. Kim, "Surface micromachined solenoid on-Si and on-glass inductors for RF applications," IEEE Electron Device Lett., vol. 20, no. 9, pp. 487-489, Sep. 1999.
19. A. M. Niknejad and R. G. Meyer, "Analysis, design, and optimization of spiral inductors and transformers for Si RF ICs," IEEE J. Solid-State Circuits, vol. 33, no. 10, pp. 1470-1481, Oct. 1998.
20. H.-S. Tsai, J. Lin, R. C. Frye, K. L. Tai, M. Y Lau, D. Kossives, F. Hrycenko, and Y.-K. Chen, "Investigation of current crowding effect on spiral inductors," in IEEE MTT-S Wireless Applications Technologies Symp. Dig., Feb. 1997, pp. 139-142.
21. W. B. Kuhn and N. M. Ibrahim, "Analysis of current crowding effects in multiturn spiral inductors," IEEE Trans. Microw. Theory Tech., vol. 49, no. 1, pp. 31-38, Jan. 2001.
22. J. N. Burghartz, "Progress in RF inductors on silicon-Understanding substrate losses," in IEEE Int. Electron Devices Meeting, Dec. 1998, pp. 523-526.
23. S.-M. Yim, T. Chen, and K. O, "The effects of a ground shield on the characteristics and performance of spiral inductors," IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 237-244, Feb. 2002.