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Volumn 15, Issue 2 PART I, 2005, Pages 320-323

Design and implementation of stochastic neurosystem using SFQ logic circuits

Author keywords

Neural network; Single flux quantum; Stochastic logic; Up down counter

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMBINATORIAL CIRCUITS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; JOSEPHSON JUNCTION DEVICES; LOGIC CIRCUITS; LOGIC GATES; OPTIMIZATION; RANDOM PROCESSES; REAL TIME SYSTEMS; SEMICONDUCTOR JUNCTIONS;

EID: 22144451793     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.849818     Document Type: Conference Paper
Times cited : (14)

References (12)
  • 1
    • 0026866931 scopus 로고
    • Functional abilities of a stochastic logic neural network
    • May
    • Y. Kondo and Y. Sawada, "Functional abilities of a stochastic logic neural network," IEEE Trans. Neural Netw., vol. 3, pp. 434-443, May 1992.
    • (1992) IEEE Trans. Neural Netw. , vol.3 , pp. 434-443
    • Kondo, Y.1    Sawada, Y.2
  • 4
    • 5444242060 scopus 로고    scopus 로고
    • Implementation of continuous-time dynamics on stochastic neurochip
    • Sep.
    • S. Akimoto, A. Momoi, S. Sato, and K. Nakajima, "Implementation of continuous-time dynamics on stochastic neurochip," IEICE Trans. Fundamentals, vol. E87-A, no. 9, pp. 2227-2232, Sep. 2004.
    • (2004) IEICE Trans. Fundamentals , vol.E87-A , Issue.9 , pp. 2227-2232
    • Akimoto, S.1    Momoi, A.2    Sato, S.3    Nakajima, K.4
  • 6
    • 0026116572 scopus 로고
    • RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems
    • Mar.
    • K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems," IEEE Trans. Appl. Superconduct., vol. 1, pp. 3-28, Mar. 1991.
    • (1991) IEEE Trans. Appl. Superconduct. , vol.1 , pp. 3-28
    • Likharev, K.K.1    Semenov, V.K.2
  • 7
    • 0002687796 scopus 로고
    • A Josephson integrated circuit simulator (JSIM) for superconductive electronics application
    • E. S. Fang and T. V. Duzer, "A Josephson integrated circuit simulator (JSIM) for superconductive electronics application," in Extended Abstracts Int. Superconductive Electronics Conf., 1989, pp. 407-410.
    • (1989) Extended Abstracts Int. Superconductive Electronics Conf. , pp. 407-410
    • Fang, E.S.1    Duzer, T.V.2
  • 12
    • 0042442209 scopus 로고    scopus 로고
    • Implementation of phase-mode arithmetic elements for parallel signal processing
    • Jun.
    • T. Onomi, Y. Horima, M. Kobori, I. Shimizu, and K. Nakajima, "Implementation of phase-mode arithmetic elements for parallel signal processing," IEEE Trans. Appl. Supercond., vol. 13, pp. 583-586, Jun. 2003.
    • (2003) IEEE Trans. Appl. Supercond. , vol.13 , pp. 583-586
    • Onomi, T.1    Horima, Y.2    Kobori, M.3    Shimizu, I.4    Nakajima, K.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.