Demonstration of 17GHz operation of M-code generator based on SFQ with resettable latch

IEEE Transactions on Applied Superconductivity

Volumn 11, Issue 1, 2001, Pages 521-524

  Akahori, Akira ^a   Fakeuchi, Nobuo ^a   Mori, Naoko ^a   Suzuki, Yasutoshi ^a   Furuta, Futoshi ^a   Fujimaki, Akira ^a   Hayakawa, Hisao ^a  

^a NAGOYA UNIVERSITY   (Japan)

Author keywords

M code generator; On chip testing system; SFQ RL

Indexed keywords

CODES (SYMBOLS); COMPUTER SIMULATION; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; LOGIC GATES; MONTE CARLO METHODS; SHIFT REGISTERS;

M-CODE GENERATOR; ON CHIP TESTING; SINGLE FLUX QUANTUM WITH RESETTALE LATCH;

JOSEPHSON JUNCTION DEVICES;

EID: 0035268158     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.919397     Document Type: Article

References (10)

1. RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems
2. 3.69 GHz single flux quantum pseudorandom bit sequence generator fabricated with Nb/AlOx/Nb
3. Modulation and demodulation of 2GHz pseudo random binary sequence using SFQ digital circuits
4. New logic circuits based on SFQ signals
5. Experimental demonstration of single flux quantum logic with resettable latch
6. Adovanced on-chip test technology for RSFQ circuits
7. A Josephson integrated circuit simulator (JSIM) for superconductive electronics application
8. Fabrication process for sub-micron Josephson junctions
9. A 380ps, 9.5mW Josephson 4-Kbit RAM operated at a high bit yield
10. High-speed operation of RSFQ circuits up to 30GHz