Right-brain/left-brain integrated associative processor employing convertible multiple-instruction-stream multiple-data-stream elements

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 44, Issue 4 B, 2005, Pages 2109-2118

  Hayakawa, Hitoshi ^a   Ogawa, Makoto ^a   Shibata, Tadashi ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

Associative processor; CPU; MIMD; Parallel processing; Perception; Short instruction set

Indexed keywords

CMOS INTEGRATED CIRCUITS; DATA TRANSFER; GENERAL PURPOSE COMPUTERS; PARALLEL PROCESSING SYSTEMS; PATTERN RECOGNITION; SWITCHING;

CENTRAL PROCESSING UNIT (CPU); DATA REGISTERS; MULTIPLE-INSTRUCTION-STREAM MULTIPLE-DATA-STREAM (MIMD); SHORT INSTRUCTION SETS;

VLSI CIRCUITS;

EID: 21244503504     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/JJAP.44.2109     Document Type: Conference Paper

References (11)

1. T. Shibata: IEICE Trans. Fundamentals E85-A (2002) 600.
2. M. Ogawa, K. Ito and T. Shibata: Digest Tech. Papers, 2002 Symp. VLSI Circuits (2002) p. 244.
3. T. Yamasaki and T. Shibata: IEEE Trans. Neural Networks 14 (2003) 1257.
4. M. Yagi and T. Shibata: Trans. Neural Networks 14 (2003) 1144.
5. M. Yagi, H. Yamasaki and T. Shibata: Advances in Neural Inf. Processing Syst. 16 (2004) 1035.
6. H. Kimura and T. Shibata: Analog Integrated Circuits & Signal Processing 39 (2004) 225.
7. M. J. Flynn: Computer Architecture: Pipelined and Parallel Processor Design (Jones and Bartlett, Boston, 1995).
8. A. D. Booth: Quarterly J. Mechanics & Appl. Mathematics 4 (1951) 236.
9. S. Sakda, K. Ito, M. Ogawa and T. Shibata: private communication.
10. Y. Suzuki and T. Shibata: European Signal Processing Conf. 3 (2004) 2279.
11. K. Ito, M. Ogawa and T. Shibata: Digest Tech. Papers, Int. Solid-State Circuits Conf. (2003) p. 470.