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Volumn , Issue , 2004, Pages 239-245

Using Function Folding to improve silicon efficiency of reconfigurable arithmetic arrays

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATIONAL METHODS; DATA TRANSFER; FADING (RADIO); FIELD PROGRAMMABLE GATE ARRAYS; MATHEMATICAL MODELS; ROUTERS;

EID: 20844443634     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (10)
  • 2
    • 0031645164 scopus 로고    scopus 로고
    • Fast module mapping and placement for datapaths in FPGAs
    • Monterrey, CA
    • T. J. Callahan, P. Chong, A. DeHon, and J. Wawrzynek. Fast module mapping and placement for datapaths in FPGAs. In Proc. FPGA'98, Monterrey, CA, 1998.
    • (1998) Proc. FPGA'98
    • Callahan, T.J.1    Chong, P.2    Dehon, A.3    Wawrzynek, J.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.