Mobility enhancement in local strain channel nMOSFETs by stacked a-Si/poly-Si gate and capping nitride

IEEE Electron Device Letters

Volumn 26, Issue 4, 2005, Pages 267-269

  Lu, Tsung Yi ^a   Chao, Tien Sheng ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Mobility; nMOSFET; Poly Si; Strain

Indexed keywords

CARRIER MOBILITY; CHEMICAL VAPOR DEPOSITION; GATES (TRANSISTOR); INTEGRATED CIRCUIT MANUFACTURE; POLYSILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SILICON NITRIDE; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

POLYSILICON GATE STRUCTURE; SILICON NITRIDE CAPPING LAYER;

MOSFET DEVICES;

EID: 17744399086     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.845499     Document Type: Article

References (10)

1. J. Welser. J. L. Hoyt, and J. F. Gibbons. "Electron mobility enhancement in strained-Si n-type metal-oxide-semiconductor field-effect transistors," IEEE Electron Device Lett., vol. 15, no. 3, pp. 100-102, Mar. 1994.
2. K. Ismail, B. S. Meyerson, S. Rishton, J. Chu, S. Nelson, and J. Nocera, "High-transconductance n-type Si/SiGe modulation-doped field-effect transistors," IEEE Electron Device Lett., vol. 13, no. 5, pp. 229-231, May 1992.
3. C.H. Chen, T. L. Lee, T. H. Hou, C. L. Chen, C. C. Chen, J. W. Hsu, K. L. Cheng, Y. H. Chiu, H. J. Tao, Y. Jin, C. H. Diaz, S. C. Chen, and M. S. Li-iang, "Stress memorization technique (SMT) by selectively strained-nitride capping for sub-65 nm high-performance strained-Si device application," in Symp. VLSI Tech. Dig., 2004, pp. 56-57.
4. S. Ito, H. Namba, K. Yamaguchi, T. Hirata, K. A. S. Koyama, S. Kuroki, N. Ikezawa, T. Saitoh, and T. Horiuchi, "Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design," in IEDM Tech. Dig., 2000, pp. 247-250.
5. A. Shimizu, K. Hachimine, N. Ohki, H. Ohta, M. Koguchi, Y. Nonaka, H. Sato, and F. Ootsuka, "Local mechanical-stress control (LSM): a new technique for CMOS-performance enhancement," in IEDM Tech. Dig., 2001, pp. 433-436.
6. K. Ota, K. Sugihara, H. Sayama, T. Uchida, H. Oda, T. Eimori, H. Morimoto, and Y. Inoue, "Novel local strained channel technique for high performance 55 nm CMOS," in IEDM Tech. Dig., 2002, pp. 27-30.
7. T. S. Chao, C. L. Lee, and T. F. Lei, "Multiple-angle incident ellipsometry measurement on low pressure chemical vapor deposited amorphous silicon and polysilicon," J. Electrochem. Soc., vol. 141, pp. 2146-2151, 1994.
8. Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. Cambridge, U.K.: Cambridge Univ. Press, 1998, ch. 2.
9. G. Groeseneken, H. E. Maes, N. Beltran, and R. F. De Keersmaecker, "A reliable approach to charge-pumping measurements in MOS transistors," IEEE Trans. Electron Devices, vol. ED-31, no. 1, pp. 42-53, Jan. 1984.
10. P. Heremans, J. Witters, G. Groeseneken, and H. E. Maes, "Analysis of the charge pumping technique and its application for the evaluation of MOSFET degradation," IEEE Trans. Electron Devices, vol. 36, no. 7, pp. 1318-1335, Jul. 1989.