SETMOS: A Novel True Hybrid SET- CMOS High Current Coulomb Blockade Oscillation Cell for Future Nano-Scale Analog ICs

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2003, Pages 703-706

  Mahapatra, Santanu ^a   Pott, Vincent ^a   Ecoffey, Serge ^a   Schmid, Alexandre ^a   Wasshuber, Christoph ^b   Tringe, Joseph W ^c   Leblebici, Yusuf ^a   Declercq, Michel ^a   Banerjee, Kaustav ^d   Ionescu, Adrian M ^a  

^a EPFL   (Switzerland)

^b TEXAS INSTRUMENTS   (United States)

^c AIR FORCE RESEARCH LABORATORY   (United States)

^d University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; COULOMB BLOCKADE; GAIN MEASUREMENT; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; LEAKAGE CURRENTS; MONTE CARLO METHODS; NANOTECHNOLOGY; NEGATIVE RESISTANCE; NEURAL NETWORKS;

NEGATIVE DIFFERENTIAL RESISTANCES (NDR); SINGLE ELECTRON BOXES (SEB); SINGLE ELECTRON TRANSISTORS (SET);

MOSFET DEVICES;

EID: 17644439135     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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