Low power digital circuit design

ESSCIRC 2004 - Proceedings of the 30th European Solid-State Circuits Conference

Volumn , Issue , 2004, Pages 11-18

  Sakurai, Takayasu ^a  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; ELECTRONIC EQUIPMENT; INFORMATION TECHNOLOGY; LEAKAGE CURRENTS; LOGIC DESIGN; MICROPROCESSOR CHIPS; MOSFET DEVICES; PARAMETER ESTIMATION; POWER CONTROL; THRESHOLD VOLTAGE; COSTS; ELECTRIC POWER UTILIZATION; GRANULAR MATERIALS; MOS DEVICES; OPTIMIZATION; PRODUCT DESIGN;

LOW POWER DIGITAL CIRCUITS; POWER CONSUMPTION; SCALING LAW; SPATIAL GRANULARITY; DYNAMIC ADAPTIVE CONTROL; FINER GRAINS; LOW PAPER DIGITAL CIRCUIT DESIGN;

DIGITAL CIRCUITS;

EID: 17644410112     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

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2. T.Sakurai, "Perspectives of Low-Power VLSI's (invited)," IEICE Transactions, Vol.E87-C, No.4, p.429-437, Apr. 2004.
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6. T.Sakurai, "Perspectives of Low Power Electronics (invited)," International Conference on Integrated Circuit Design & Technology: Distinguished Lecture, Austin, Texas, May 17, 2004.
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