Area and energy-efficient crosstalk avoidance codes for on-chip buses

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2004, Pages 12-17

  Sridhara, Srinivasa R ^a   Ahmed, Arshad ^a   Shanbhag, Naresh R ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COUPLING CAPACITANCES; DEEP SUBMICRON (DSM); ENERGY-EFFICIENT CROSSTALK AVOIDANCE CODES; OVERLAPPING CODES;

BUSBARS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; CROSSTALK; DATA ACQUISITION; ENERGY DISSIPATION; ENERGY EFFICIENCY; MATHEMATICAL MODELS; PATTERN RECOGNITION; STATISTICAL METHODS;

MICROPROCESSOR CHIPS;

EID: 17644367223     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2004.1347891     Document Type: Conference Paper

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