Architecture-aware low-density parity-check codes

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2003, Pages

  Mansour, Mohammad M ^a   Shanbhag, Naresh ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DECODING; OPTIMIZATION; SILICON; WIRE;

LOW-DENSITY PARITY-CHECK (LDPC) CODES;

SIGNAL ENCODING;

EID: 17144466637     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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