Carbon-nanotube-based voltage-mode multiple-valued logic design

IEEE Transactions on Nanotechnology

Volumn 4, Issue 2, 2005, Pages 168-179

  Raychowdhury, Arijit ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; COMPUTER SOFTWARE; FIELD EFFECT TRANSISTORS; LOGIC DESIGN; LOGIC GATES; THRESHOLD VOLTAGE;

CIRCUIT COMPATIBLE MODELS; LOAD HANDLING CAPACITY; MOLECULAR DEVICES; VOLTAGE MODE MULTIPLE VALUED LOGIC DESIGN;

CARBON NANOTUBES;

EID: 15944374738     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2004.842068     Document Type: Article

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