Reconfigurable hardware implementation of an improved parallel architecture for MPEG-4 motion estimation in mobile applications

IEEE Transactions on Consumer Electronics

Volumn 49, Issue 4, 2003, Pages 1383-1390

  Gao, R ^a   Xu, D ^a   Bentley, J P ^b  

^a TEESSIDE UNIVERSITY   (United Kingdom)

^b NONE

Author keywords

Full search; Motion estimation; MPEG 4; VLSI

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE COMPRESSION; MOTION ESTIMATION; MULTIMEDIA SYSTEMS; REDUNDANCY; SHIFT REGISTERS; VIDEO CONFERENCING; VIDEO ON DEMAND; VLSI CIRCUITS;

MATCHING CRITERION; MOTION PICTURES EXPERTS GROUP; PARALLEL ARCHITECTURE; VIDEO SEQUENCES;

PIPELINE PROCESSING SYSTEMS;

EID: 1542542535     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2003.1261244     Document Type: Article

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