Energy efficient datapath synthesis using Dynamic Frequency Clocking and Multiple Voltages

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1999, Pages 440-445

  Krishna, Vamsi ^a   Ranganathan, N ^a   Vijaykrishnan, N ^a  

^a UNIVERSITY OF SOUTH FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC POTENTIAL; ENERGY EFFICIENCY; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; OPTIMIZATION;

DATAPATH CIRCUITS; DYNAMIC FREQUENCY CLOCKING AND MULTIPLE VOLTAGE SCALING (DFMVS);

VLSI CIRCUITS;

EID: 0032759492     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icvd.1999.745195     Document Type: Conference Paper

References (14)