A 500-MHz-1.25-GHz fast-locking pulsewidth control loop with presettable duty cycle

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 3, 2004, Pages 463-468

  Han, Sung Rung ^a   Liu, Shen Iuan ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Duty cycle presetting; Fast locking; Pulsewidth control loop (PWCL); Switched charge pump; Voltage difference to digital converter

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; PHASE LOCKED LOOPS; PULSE WIDTH MODULATION; SWITCHING CIRCUITS; TIMING CIRCUITS; TRANSIENTS;

FAST LOCKING CONTROL LOOP; PRESETTABLE DUTY CYCLE; PULSEWIDTH CONTROL LOOP; SWITCHED CHARGE PUMP CIRCUITS; VOLTAGE DIFFERENCE TO DIGITAL CONVERTER;

SOLID STATE DEVICES;

EID: 1542500853     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.822781     Document Type: Article

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