메뉴 건너뛰기




Volumn , Issue , 2004, Pages 389-394

Extended dynamic voltage scaling for low power design

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE SCALING (DVS); NOISE-SENSITIVE CIRCUITS; SPICE SIMULATIONS; SUBTHRESHOLD CURRENTS;

EID: 14844312056     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (22)
  • 2
    • 77954701375 scopus 로고    scopus 로고
    • Intel XScale. http://www.intel.com/design/intelxscale/
    • Intel XScale
  • 3
    • 84871264613 scopus 로고    scopus 로고
    • IBM PowerPC. http://www.chips.ibm.com/products/powerpc/
    • IBM PowerPC
  • 5
    • 0025415048 scopus 로고
    • Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
    • April
    • T. Sakurai and A. Newton, "Alpha-Power Law MOSFET Model and Its Applications to CMOS Inverter Delay and other Formulas",IEEE JSSCC, Vol. 25, No. 2, April 1990.
    • (1990) IEEE JSSCC , vol.25 , Issue.2
    • Sakurai, T.1    Newton, A.2
  • 6
    • 0036114022 scopus 로고    scopus 로고
    • A 175mV multiply-accumulate unit using an adaptive supply voltage and body bias (ASB) architecture
    • M. Miyazaki, J. Kao, A. Chandrakasan, "A 175mV Multiply-Accumulate Unit using an Adaptive Supply Voltage and Body Bias (ASB) Architecture", ISSCC 2002, pp. 58-59.
    • ISSCC 2002 , pp. 58-59
    • Miyazaki, M.1    Kao, J.2    Chandrakasan, A.3
  • 7
    • 2442716234 scopus 로고    scopus 로고
    • A 180mV FFT processor using subthreshold circuits techniques
    • A. Wang, A. Chandrakasan, "A 180mV FFT Processor Using Subthreshold Circuits Techniques", ISSCC 2004, pp. 292-294.
    • ISSCC 2004 , pp. 292-294
    • Wang, A.1    Chandrakasan, A.2
  • 9
    • 0034295707 scopus 로고    scopus 로고
    • The fundamental limit on binary switching energy for terascale integration (TSI)
    • Oct.
    • J. D. Meindl and J. A. Davis, "The fundamental limit on binary switching energy for terascale integration (TSI)," IEEE JSSCC, vol. 35, pp. 1515-1516, Oct. 2000.
    • (2000) IEEE JSSCC , vol.35 , pp. 1515-1516
    • Meindl, J.D.1    Davis, J.A.2
  • 10
    • 4444370486 scopus 로고    scopus 로고
    • Algorithm and architecture of a 1-V low-power hearing instrument DSP
    • Aug.
    • F. Møller, "Algorithm and architecture of a 1-V low-power hearing instrument DSP", ISLPED, pp. 711, Aug. 1999
    • (1999) ISLPED , pp. 711
    • Møller, F.1
  • 11
    • 84860100037 scopus 로고    scopus 로고
    • BSIM3
    • BSIM3. http://www-device.eecs.berkeley.edu/~bsim3/get.html
  • 13
    • 0033688320 scopus 로고    scopus 로고
    • Digital CMOS logic operation in the sub-threshold region
    • March
    • H. Soeleman, K. Roy, "Digital CMOS logic operation in the sub-threshold region", in GVLSI, pp. 107-112, March 2000.
    • (2000) GVLSI , pp. 107-112
    • Soeleman, H.1    Roy, K.2
  • 14
    • 2342557097 scopus 로고    scopus 로고
    • Optimal supply and threshold scaling for subthreshold CMOS circuits
    • April
    • A. Wang, A.P. Chandrakasan and S.V. Kosonocky, "Optimal supply and threshold scaling for subthreshold CMOS circuits," IEEE Symposium on VLSI, pp. 5-9, April 2002
    • (2002) IEEE Symposium on VLSI , pp. 5-9
    • Wang, A.1    Chandrakasan, A.P.2    Kosonocky, S.V.3
  • 17
    • 0036858657 scopus 로고    scopus 로고
    • A 32-bit powerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling
    • Nov.
    • K. Nowka, G. Carpenter, et al, "A 32-bit PowerPC System-on-a-Chip With Support for Dynamic Voltage Scaling and Dynamic Frequency Scaling", JSSCC, pp. 1441-1447, vol. 37, Nov. 2002
    • (2002) JSSCC , vol.37 , pp. 1441-1447
    • Nowka, K.1    Carpenter, G.2
  • 18
    • 0242720765 scopus 로고    scopus 로고
    • Dynamic Sleep Transistor and Body Bias for Active Leakage Power Control of Microprocessors
    • Nov.
    • J. Tschanz, S. Narendra, Y. Ye, et al, "Dynamic Sleep Transistor and Body Bias for Active Leakage Power Control of Microprocessors", JSSCC, pp.1838-1845, vol. 38, Nov. 2003
    • (2003) JSSCC , vol.38 , pp. 1838-1845
    • Tschanz, J.1    Narendra, S.2    Ye, Y.3
  • 19
    • 1542329520 scopus 로고    scopus 로고
    • Understanding and minimizing groudn bounce during mode transition of power gating structures
    • Aug.
    • S. Kim, S. Kosonocky, D. Knebel, "Understanding and Minimizing Groudn Bounce during Mode Transition of Power Gating Structures", ISLPED pp. 22-25, Aug. 2003.
    • (2003) ISLPED , pp. 22-25
    • Kim, S.1    Kosonocky, S.2    Knebel, D.3
  • 20
    • 33947132020 scopus 로고
    • High efficiency DC-DC converters for battery-operated systems with energy management
    • Worldwide Wireless Communications
    • R. Erickson and D. Maksimovic, "High Efficiency DC-DC Converters for Battery-Operated Systems with Energy Management," Worldwide Wireless Communications, Annual Reviews on Telecommunications, 1995.
    • (1995) Annual Reviews on Telecommunications
    • Erickson, R.1    Maksimovic, D.2
  • 22
    • 0036565316 scopus 로고    scopus 로고
    • An efficient digital sliding controller for adaptive power-supply regulation
    • May
    • J. Kim and M. A. Horowitz, "An Efficient Digital Sliding Controller for Adaptive Power-Supply Regulation," in JSSCC, May 2002, vol. 37, pp. 639-647
    • (2002) JSSCC , vol.37 , pp. 639-647
    • Kim, J.1    Horowitz, M.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.