An Abstract Interpretation-Based Timing Validation of Hard Real-Time Avionics Software

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2003, Pages 625-632

  Thesing, Stephan ^a   Souyris, Jean ^b   Heckmann, Reinhold ^c   Randimbivololona, Famantanantsoa ^b   Langenbach, Marc ^a   Wilhelm, Reinhard ^a   Ferdinand, Christian ^c  

^a SAARLAND UNIVERSITY   (Germany)

^b AIRBUS   (France)

^c AbsInt Angewandte Informatik GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

AVIONICS SOFTWARE; WORST-CASE EXECUTION TIME (WCET);

AIR TRAFFIC CONTROL; AVIONICS; FLIGHT DYNAMICS; MICROPROCESSOR CHIPS; SEMANTICS;

COMPUTER SOFTWARE;

EID: 1542330092     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2003.1209972     Document Type: Conference Paper

References (18)

1. P. Cousot and R. Cousot. Abstract Interpretation: A Unified Lattice Model for Static Analysis of Programs by Construction or Approximation of Fixpoints. In Proceedings of the 4th ACM Symposium on Principles of Programming Languages, pages 238-252, Jan. 1977.
2. J. Engblom. Processor Pipelines and Static Worst-Case Execution Time Analysis. PhD thesis, Uppsala University, 2002.
3. C. Ferdinand. Cache Behavior Prediction for Real-Time Systems. PhD thesis, Saarland University, 1997.
4. C. Ferdinand, R. Heckmann, M. Langenbach, F. Martin, M. Schmidt, H. Theiling, S. Thesing, and R. Wilhelm. Reliable and precise WCET determination for a real-life processor. In Proceedings of EMSOFT 2001, First Workshop on Embedded Software, volume 2211 of Lecture Notes in Computer Science, 2001.
5. R. Heckmann and S. Thesing. Cache and Pipeline Analysis for the ColdFire 5307. Technical report, Saarland University, 2001.
6. M. Inc. MCF5307 ColdFire Integrated Microprocessor User's Manual. Motorola Inc., Aug. 2000. MCF5307UM/D, Rev. 2.0.
7. M. Langenbach, S. Thesing, and R. Heckmann. Pipeline Modeling for Timing Analysis. Proceedings of the 9th International Static Analysis Symposium, 2002.
8. Y.-T. S. Li, S. Malik, and A.Wolfe. Cache Modeling for Real-Time Software: Beyond Direct Mapped Instruction Caches. IEEE Real-Time Systems Symposium, January 1997.
9. T. Lundqvist and P. Stenström. Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques. In F. Mueller and A. Bestavros, editors, Proceedings of the ACM SIGPLAN Workshop Languages, Compilers and Tools for Embedded Systems (LCTES), volume 1474 of Lecture Notes in Computer Science, pages 1-15, 1998.
10. T. Lundqvist and P. Stenström. An Integrated Path and Timing Analysis Method Based on Cycle-Level Symbolic Execution. Real-Time Systems, 17(2/3):183-207, November 1999.
11. F. Martin, M. Alt, R. Wilhelm, and C. Ferdinand. Analysis of Loops. In Proceedings of the International Conference on Compiler Construction (CC'98). Springer-Verlag, 1998.
12. F. Nielson, H. R. Nielson, and C. Hankin. Principles of Program Analysis. Springer-Verlag, 1999.
13. J. Schneider and C. Ferdinand. Pipeline Behavior Prediction for Superscalar Processors. Technical report, Saarland University, May 1999.
14. J. Schneider and C. Ferdinand. Pipeline Behavior Prediction for Superscalar Processors by Abstract Interpretation. In Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, volume 34, pages 35-44, May 1999.
15. H. Theiling. Extracting Safe and Precise Control Flow from Binaries. In Proceedings of the 7th Conference on Real-Time Computing Systems and Applications, Cheju Island, South Korea, 2000.
16. H. Theiling. Generating Decision Trees for Decoding Binaries. In Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Snowbird, Utah, USA, June 2001.
17. H. Theiling. ILP-based Interprocedural Path Analysis. In Proceedings of the Workshop on Embedded Software, Grenoble, France, October 2002.
18. H. Theiling and C. Ferdinand. Combining Abstract Interpretation and ILP for Microarchitecture Modelling and Program Path Analysis. In Proceedings of the 19th IEEE Real-Time Systems Symposium (RTSS), Madrid, Spain, 1998.