Embedded ferroelectric memory technology with completely encapsulated hydrogen barrier structure

IEEE Transactions on Semiconductor Manufacturing

Volumn 18, Issue 1, 2005, Pages 49-53

  Nagano, Yoshihisa ^a,b   Mikawa, Takumi ^a,b   Kutsunai, Toshie ^a,b   Natsume, Shinya ^a,b   Tatsunari, Toshitaka ^a,b   Ito, Toyoji ^a,b   Noma, Atsushi ^a,b   Nasu, Toru ^a,b   Hayashi, Shinichiro ^a,b   Hirano, Hiroshige ^a,b   Gohou, Yasushi ^c   Judai, Yuji ^a,b   Fujii, Eiji ^a,b  

^a ULSI Proc Technol Devmt Center   (Japan)

^b PANASONIC CORPORATION   (Japan)

^c Syst LSI Technol Devmt Center   (Japan)

Author keywords

Ferroelectric memory; Hydrogen barrier; Low voltage operation; Reliability

Indexed keywords

FERROELECTRIC MEMORY; FLUOROSILICATE GLASS (FSG); HYDROGEN BARRIERS; LOW-VOLTAGE OPERATION;

CHEMICAL VAPOR DEPOSITION; FERROELECTRIC MATERIALS; HYDROGEN; LSI CIRCUITS; PERSONAL DIGITAL ASSISTANTS; RELIABILITY; THIN FILMS;

EMBEDDED SYSTEMS;

EID: 13844266385     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2004.841821     Document Type: Article

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