High-resistivity polycrystalline silicon as RF substrate in wafer-level packaging

Electronics Letters

Volumn 41, Issue 2, 2005, Pages 100-101

  Polyakov, A ^a   Sinaga, S ^a   Mendes, P M ^b   Bartek, M ^a   Correia, J H ^b   Burghartz, J N ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b UNIVERSITY OF MINHO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHIZATION; ELECTRIC CONDUCTIVITY; ELECTRIC INDUCTORS; ELECTRIC LINES; ELECTRONICS PACKAGING; FREQUENCIES; INTEGRATED CIRCUITS; PERMITTIVITY; SILICON WAFERS; SUBSTRATES; THERMAL CONDUCTIVITY; WAVEGUIDES;

QUALITY FACTOR; RADIO-FREQUENCY (RF) SYSTEMS; SILICON RESISTIVITY; WAFER-LEVEL PACKAGING (WLP);

POLYSILICON;

EID: 13844254234     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20056872     Document Type: Article

References (5)

1. Burghartz, J.N., and Rejaei, B.: 'On the design of RF spiral inductors on silicon', IEEE Trans. Electron Devices, 2003, 50, (3), pp. 718-729
2. Pham, N.P., Ng, K.T., Bartek, M., Sarro, P.M., Rejaei, P.M., and Burghartz, J.N.: 'A micromachining post-process module for RF silicon technology', Int. Electron Devices Meet. Tech. Dig., 2000, pp. 481-484
3. Van Beek, J., Van Delden, M., et al.: 'High-Q integrated RF passives and micromechanical capacitors on silicon'. Proc. Bipolar/BiCMOS Circuits and Technology Mtg (BCTM), 2003, pp. 147-150
4. Badihi, A.: 'Ultra-thin wafer-level chip-size package', IEEE Trans. Adv. Packag., 2000, 23, (2), pp. 212-214
5. Rong, B., Burghartz, J.N., Nanver, L.K., Rejaei, B., and Van Der Zwan, M.: 'Surface-passivated high-resistivity substrates for RF IC's', IEEE Electron Device Lett., 2003, 25, (4), pp. 176-178