Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 1, 2005, Pages 100-106

  Rosa, Alberto La ^a   Lavagno, Luciano ^a   Passerone, Claudio ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

Achitectural tradeoffs; Compilers; Computer architectures; Hardware software (HW SW) co design; Performance modeling; Reconfigurable processors; Turbo decoder

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DECODING; DIGITAL SIGNAL PROCESSING; LOCAL AREA NETWORKS; MICROCONTROLLERS; NETWORK PROTOCOLS; TURBO CODES; WIRELESS TELECOMMUNICATION SYSTEMS;

ARCHITECTURAL TRADEOFFS; COMPILERS; HARDWARE/SOFTWARE (HW/SW) CO-DESIGN; PERFORMANCE MODELING; RECONFIGUTABLE PROCESSORS; TURBO DECODERS;

EMBEDDED SYSTEMS;

EID: 11844256295     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.839466     Document Type: Conference Paper

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