Clock design of 300MHz 128-bit 2-way superscalar microprocessor

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2000, Pages 647-652

  Ishihara, Fujio ^a   Klinger, Christian ^b   Agawa, Ken Ichi ^a  

^a TOSHIBA CORPORATION   (Japan)

^b Toshiba America Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DESIGN; CLOCK SIGNAL DISTRIBUTION; DESIGN PERIOD; GLOBAL CLOCKS; LAYOUT PATTERNS; PROCESS FLUCTUATIONS; SUPERSCALAR MICRO-PROCESSORS; TUNING METHOD;

COMPUTER AIDED DESIGN; FORESTRY; MICROPROCESSOR CHIPS;

ELECTRIC CLOCKS;

EID: 84884683214     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368857     Document Type: Conference Paper

References (12)

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