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Volumn 12, Issue 8, 2000, Pages 1073-1075

16 × 16 VCSEL array flip-chip bonded to CMOS VLSI circuit

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; CROSSTALK; ELECTRIC IMPEDANCE; FLIP CHIP DEVICES; INTERFERENCE SUPPRESSION; MODULATION; QUANTUM WELL LASERS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE TESTING; VLSI CIRCUITS;

EID: 0343878169     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/68.868012     Document Type: Article
Times cited : (65)

References (6)
  • 4
    • 84988760536 scopus 로고    scopus 로고
    • A. R. Tanguay, Jr., private communication
    • A. R. Tanguay, Jr., private communication.
  • 6
    • 0030195761 scopus 로고    scopus 로고
    • Reduction of thermal impedance of VCSEL's after integration with copper substrates
    • D. L. Mathine, H. Nejad, D. R. Allee, R. Droopad, and G. N. Maracas, "Reduction of thermal impedance of VCSEL's after integration with copper substrates," Appl. Phys. Lett., vol. 69, pp. 463-464, 1996.
    • (1996) Appl. Phys. Lett. , vol.69 , pp. 463-464
    • Mathine, D.L.1    Nejad, H.2    Allee, D.R.3    Droopad, R.4    Maracas, G.N.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.