Assessment of silicon wafer material for the fabrication of integrated circuit sensors

Journal of the Electrochemical Society

Volumn 147, Issue 4, 2000, Pages 1604-1611

  Muller T ^a   Kissinger, G ^b   Benkitsch, A C ^c   Brand, O ^a   Baltes, H ^a  

^a ETH ZURICH   (Switzerland)

^b IHP   (Germany)

^c AMS AG   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

ANISOTROPY; CMOS INTEGRATED CIRCUITS; CRYSTAL DEFECTS; ETCHING; INTEGRATED CIRCUIT MANUFACTURE; MORPHOLOGY; OXYGEN; PRECIPITATION (CHEMICAL); SILICON SENSORS; SURFACES;

DEFECT FREE ZONE; WET ANISOTROPIC ETCHING;

SILICON WAFERS;

EID: 0343390504     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1393404     Document Type: Article

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