A high voltage Dickson charge pump in SOI CMOS

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2003, Pages 493-496

  Hoque, Mohammad R ^a   McNutt, Ty ^a   Zhang, Jimmy ^a   Mantooth, Alan ^a   Mojarradi, Mohammad ^b  

^a UNIVERSITY OF ARKANSAS   (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CHARGE TRANSFER; COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; MATHEMATICAL MODELS; MOSFET DEVICES; SEMICONDUCTOR DIODES; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES;

DICKSON CHARGE PUMP; VOLTAGE PUMPING GAIN;

CMOS INTEGRATED CIRCUITS;

EID: 0242611923     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. W. C. Tang, "Micromechanical devices at JPL for space exploration," Proc. of the 1998 IEEE Aerospace Conference, vol. 1, pp. 461-470, March 1998.
2. P. H. Saul, K. M. Brunson, R. J. T. Bunyan, "Versatile high voltage level shifter and driver for MEMS applications," Electronics Letters, vol. 39, no. 2, pp. 185-186, January 2003.
3. L. Sun, P. Sun, X. Qin, C. Wang, "Micro Robot in Small Pipe with Electromagnetic Actuator," Proc. 1998 International Sym. on Micromechatronics and Human Science pp. 243-248, Nov. 1998.
4. J. A. Starzyk, Q. J. Ying-Wei, A. Fengjing, "A DC-DC charge pump design based on voltage doublers," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 48, no. 3, pp. 350-359, March 2001.
5. K. Sawada, Y. Sugawara, S. Masui, "An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V," Digest of the 1995 Symposium on VLSI Circuits, pp. 75-76.
6. M. Shoyama, M. Ohba, T. Ninomiya, "Balanced buck-boost switching converter a reduce common-mode conducted noise," Proc. of the 2002 IEEE Power Electronics Specialists Conference (PESC), vol. 4, pp. 2056-2061, Cairns, Australia, June, 2002.
7. H. M. Van, L. Jeong-Ho, S. Kubicek, L. Greenen, K. De Meyer, "Threshold voltage design incompatibility between partially-depleted SOI and bulk CMOS transistors," Proc. of 1999 International SOI Conference, pp. 32-33.
8. S. Cristoloveanu, F. Balestra, "SOI Technologies, Materials and Devices". Proc. of the 1996 Inter. Semiconductor Conference, vol. 1, pp. 3-12.
9. A. J. Auberton Herve, "SOI Technologies Applications," Proc. of the 1990 IEEE SOS/SOI Technology Conference, pp. 149-150.
10. R. K. Lawrence, "Radiation effects in SOI isolation oxides," Proc. of the 2001 International Semiconductor Device Research Symposium, pp. 461-464.
11. J. F. Dickson, "On-chip High-Voltage Generation in NMOS Integrated Circuits Using an Improved Voltage Multiplier Technique". IEEE Journal of Solid-State Circuits, vol. SC-11, no. 3, June 1976, pp. 374-378.
12. J. B. Kuo and S. Lin, Low Voltage SOI CMOS VLSI Devices and Circuits, New York: Wiley Intersciences, 2001.
13. Medici User's Manual, Rel. 2002.2, Avant! Corp., 1999.
14. W. Liu, MOSFET Models for SPICE Simulation including BSIM3v3 and BSIM4. New York: Wiley Intersciences, 2001.
15. H. A. Mantooth, J. L. Duliere, "A Unified Diode Model for Circuit Simulation," IEEE Trans. on Power Electronics, vol. 12, no. 5, pp. 816-823, September 1997.
16. G. Palumbo, D. Pappalardo, M. Gaibotti, "Charge-Pump Circuits: Power-Consumption Optimization," IEEE Trans. Circuits Syst. I, vol. 49, no. 11, pp. 1535-1542, February 2002.