-
1
-
-
0023670354
-
Input versus Output Queuing on a Space Division Packet Switch
-
Dec.
-
M. Karol, M. Hluchyj, and S. Morgan, "Input versus Output Queuing on a Space Division Packet Switch," IEEE Trans. Commun., vol. 35, no. 12, Dec. 1987, pp. 1347-56.
-
(1987)
IEEE Trans. Commun.
, vol.35
, Issue.12
, pp. 1347-1356
-
-
Karol, M.1
Hluchyj, M.2
Morgan, S.3
-
2
-
-
0023704955
-
High Performance Multi-Queue Buffers for VLSI Communications Switches
-
June
-
Y. Tamir and G. Frazier, "High Performance Multi-Queue Buffers for VLSI Communications Switches," Proc. Computer Architecture, June 1988, pp. 343-54.
-
(1988)
Proc. Computer Architecture
, pp. 343-354
-
-
Tamir, Y.1
Frazier, G.2
-
3
-
-
0027694638
-
High-speed Switch Scheduling for Local-Area Networks
-
Nov.
-
T. Anderson et al., "High-Speed Switch Scheduling for Local-Area Networks," ACM Trans. Computer Systems, vol. 11, no. 4, Nov. 1993, pp. 319-52.
-
(1993)
ACM Trans. Computer Systems
, vol.11
, Issue.4
, pp. 319-352
-
-
Anderson, T.1
-
4
-
-
0029388337
-
Service Disciplines for Guaranteed Performance Service in Packet-Switching Networks
-
Oct.
-
H. Zhang, "Service Disciplines for Guaranteed Performance Service in Packet-Switching Networks," Proc. IEEE, vol. 83, no.10, Oct. 1995, pp. 1374-96.
-
(1995)
Proc. IEEE
, vol.83
, Issue.10
, pp. 1374-1396
-
-
Zhang, H.1
-
5
-
-
0032655137
-
The iSLIP Scheduling Algorithm for Input-Queued Switches
-
Apr.
-
N. McKeown, "The iSLIP Scheduling Algorithm For Input-Queued Switches," IEEE/ACM Trans. Net., vol. 7, no. 2, Apr. 1999, pp. 188-201.
-
(1999)
IEEE/ACM Trans. Net.
, vol.7
, Issue.2
, pp. 188-201
-
-
McKeown, N.1
-
6
-
-
0032689483
-
Matching Output Queuing with a Combined Input/Output-Queued Switch
-
June
-
S. Chuang et al., "Matching Output Queuing with a Combined Input/Output-Queued Switch," IEEE JSAC, vol. 17, no. 6, June 1999, pp. 1030-39.
-
(1999)
IEEE JSAC
, vol.17
, Issue.6
, pp. 1030-1039
-
-
Chuang, S.1
-
7
-
-
0033349686
-
Achieving 100 percent Throughput in an Input-Queued Switch
-
Aug.
-
A. Mekkittikul and N. McKeown, "Achieving 100 percent Throughput in an Input-Queued Switch," IEEE Trans. Commun., vol. 47, no. 8, Aug. 1999, pp. 1260-67.
-
(1999)
IEEE Trans. Commun.
, vol.47
, Issue.8
, pp. 1260-1267
-
-
Mekkittikul, A.1
McKeown, N.2
-
8
-
-
0033902392
-
FIRM: A Class of Distributed Scheduling Algorithms for High-Speed ATM Switches with Multiple Input Queues
-
Mar.
-
D. Serpanos and P. Antoniadis, "FIRM: A Class of Distributed Scheduling Algorithms for High-Speed ATM Switches with Multiple Input Queues," Proc. IEEE INFOCOM, Mar. 2000, pp. 548-55.
-
(2000)
Proc. IEEE INFOCOM
, pp. 548-555
-
-
Serpanos, D.1
Antoniadis, P.2
-
9
-
-
0342501963
-
Saturn: A Terabit Packet Switch Using Dual Round-Robin
-
Dec.
-
J. Chao, "Saturn: A Terabit Packet Switch Using Dual Round-Robin," IEEE Commun. Mag., vol. 38, no. 12, Dec. 2000, pp. 78-84.
-
(2000)
IEEE Commun. Mag.
, vol.38
, Issue.12
, pp. 78-84
-
-
Chao, J.1
-
10
-
-
0031647315
-
Matrix Unit Cell Scheduler (MUCS) for Input-Buffered ATM Switches
-
Jan.
-
H. Duan, J. Lockwood, and S. Kang, "Matrix Unit Cell Scheduler (MUCS) for Input-Buffered ATM Switches," IEEE Commun. Letters, vol. 2, no. 1, Jan. 1998, pp. 20-23.
-
(1998)
IEEE Commun. Letters
, vol.2
, Issue.1
, pp. 20-23
-
-
Duan, H.1
Lockwood, J.2
Kang, S.3
-
11
-
-
0028531939
-
Two-Dimensional Round-Robin Schedulers for Packet Switches with Multiple Input Queues
-
Oct.
-
R. LoMaire, and D. Serpanos, "Two-Dimensional Round-Robin Schedulers for Packet Switches with Multiple Input Queues," IEEE/ACM Trans. Net., vol. 2., no. 5, Oct. 1994, pp. 471-82.
-
(1994)
IEEE/ACM Trans. Net.
, vol.2
, Issue.5
, pp. 471-482
-
-
LoMaire, R.1
Serpanos, D.2
-
12
-
-
0035785791
-
Load Balanced Birkhoff-von Neumann Switches
-
May
-
C. Chang, D-S. Lee, and Y-S. Jou, "Load Balanced Birkhoff-von Neumann Switches," Proc. IEEE HPSR, May 2001, pp. 276-80.
-
(2001)
Proc. IEEE HPSR
, pp. 276-280
-
-
Chang, C.1
Lee, D.-S.2
Jou, Y.-S.3
-
13
-
-
0034851966
-
A High-Throughput Scheduling Algorithm for a Buffered Crossbar Switch Fabric
-
June
-
T. Javadi, R. Magill, and T. Hrabik, "A High-Throughput Scheduling Algorithm for a Buffered Crossbar Switch Fabric," Proc. IEEE ICC, June 2001, pp. 1581-91.
-
(2001)
Proc. IEEE ICC
, pp. 1581-1591
-
-
Javadi, T.1
Magill, R.2
Hrabik, T.3
-
14
-
-
0033906596
-
Scheduling Algorithms for Input-Queued Switches: Randomized Techniques and Experimental Evaluation
-
Mar.
-
M. Goudreau, S. Kollioulos, and S. Rao, "Scheduling Algorithms for Input-Queued Switches: Randomized Techniques and Experimental Evaluation," Proc. IEEE INFOCOM, Mar. 2000, pp. 1634-43.
-
(2000)
Proc. IEEE INFOCOM
, pp. 1634-1643
-
-
Goudreau, M.1
Kollioulos, S.2
Rao, S.3
-
16
-
-
0023435613
-
Integrated Services Packet Network Using Bus Matrix Switch
-
Oct.
-
S. Nojima et al., "Integrated Services Packet Network Using Bus Matrix Switch," IEEE JSAC, vol. 5, no. 8, Oct. 1987, pp. 1284-92.
-
(1987)
IEEE JSAC
, vol.5
, Issue.8
, pp. 1284-1292
-
-
Nojima, S.1
-
17
-
-
0024176705
-
Buffering Concepts for ATM Switching Networks
-
Dec.
-
E. Rathgeb, T. Theimer, and M. Huber, "Buffering Concepts for ATM Switching Networks," Proc. IEEE GLOBECOM, Dec. 1988, pp. 1277-81.
-
(1988)
Proc. IEEE GLOBECOM
, pp. 1277-1281
-
-
Rathgeb, E.1
Theimer, T.2
Huber, M.3
-
18
-
-
85176425027
-
16 × 16 Limited Intermediate Buffer Switch Module for ATM Networks
-
Dec.
-
A. Gupta, L. Barbosa, and N. Georganas, "16 × 16 Limited Intermediate Buffer Switch Module for ATM Networks," Proc. IEEE GLOBECOM, Dec. 1991, pp. 939-43.
-
(1991)
Proc. IEEE GLOBECOM
, pp. 939-943
-
-
Gupta, A.1
Barbosa, L.2
Georganas, N.3
-
19
-
-
0027562052
-
A High-Speed ATM Switch with Input and Cross-Point Buffers
-
Mar.
-
Y. Doi and N. Yamanaka, "A High-Speed ATM Switch with Input and Cross-Point Buffers," IEICE Trans. Commun., vol. E76-B, no. 3, Mar. 1993, pp. 310-14.
-
(1993)
IEICE Trans. Commun.
, vol.E76-B
, Issue.3
, pp. 310-314
-
-
Doi, Y.1
Yamanaka, N.2
-
20
-
-
0027677644
-
Performance Evaluation of Input and Output Queuing Techniques in ATM Switching Systems
-
Oct.
-
E. Re and R. Fantacci, "Performance Evaluation of Input and Output Queuing Techniques in ATM Switching Systems," IEEE Trans. Commun., vol. 40, no. 10, Oct. 1993, pp. 1565-75.
-
(1993)
IEEE Trans. Commun.
, vol.40
, Issue.10
, pp. 1565-1575
-
-
Re, E.1
Fantacci, R.2
-
21
-
-
0031648315
-
Implementing Distributed Packet Fair Queuing in a Scalable Switch Architecture
-
Apr.
-
D. Stephens and H. Zhang, "Implementing Distributed Packet Fair Queuing in a Scalable Switch Architecture," Proc. IEEE INFOCOM, Apr. 1998, pp. 282-90.
-
(1998)
Proc. IEEE INFOCOM
, pp. 282-290
-
-
Stephens, D.1
Zhang, H.2
-
22
-
-
0034156774
-
Performance Evaluation of a Combined Input- and Cross-point-Queued Switch
-
Mar.
-
M. Nabeshima, "Performance Evaluation of a Combined Input- and Cross-point-Queued Switch," IEICE Trans. Commun., vol. E83-B, no. 3, Mar. 2000, pp. 737-41.
-
(2000)
IEICE Trans. Commun.
, vol.E83-B
, Issue.3
, pp. 737-741
-
-
Nabeshima, M.1
-
23
-
-
0035785860
-
A Parallel-Polled Virtual Output Queued Switch with a Buffered Crossbar
-
May
-
K. Yoshigoe and K. Christensen, "A Parallel-Polled Virtual Output Queued Switch with a Buffered Crossbar," Proc. IEEE HPSR, May 2001, pp. 271-75.
-
(2001)
Proc. IEEE HPSR
, pp. 271-275
-
-
Yoshigoe, K.1
Christensen, K.2
-
24
-
-
0035785965
-
CIXB-1: Combined Input-One-Cell-Crosspoint Buffered Switch
-
May
-
R. Rojas-Cessa et al., "CIXB-1: Combined Input-One-Cell-Crosspoint Buffered Switch," Proc. IEEE HPSR, May 2001, pp. 324-29.
-
(2001)
Proc. IEEE HPSR
, pp. 324-329
-
-
Rojas-Cessa, R.1
-
25
-
-
0035685313
-
CIXOB-k: Combined Input-Cross-point-Output Buffered Packet Switch
-
Nov.
-
R. Rojas-Cessa, E. Oki, and H. J. Chao, "CIXOB-k: Combined Input-Cross-point-Output Buffered Packet Switch," Proc. IEEE GLOBECOM, Nov. 2001, pp. 2654-60.
-
(2001)
Proc. IEEE GLOBECOM
, pp. 2654-2660
-
-
Rojas-Cessa, R.1
Oki, E.2
Chao, H.J.3
-
26
-
-
0032301389
-
A Quantitative Comparison of Iterative Scheduling Algorithms for Input-Queued Switches
-
Dec.
-
N. McKeown and T. Anderson, "A Quantitative Comparison of Iterative Scheduling Algorithms for Input-Queued Switches," Computer Networks and ISDN Systems, vol. 30, no. 24, Dec. 1998, pp. 2309-26.
-
(1998)
Computer Networks and ISDN Systems
, vol.30
, Issue.24
, pp. 2309-2326
-
-
McKeown, N.1
Anderson, T.2
-
27
-
-
0242440156
-
A Threshold-Based Scheduling Algorithm for Input Queue Switch
-
Feb.
-
W. Cui, H. Ko, and S. An, "A Threshold-Based Scheduling Algorithm for Input Queue Switch," Proc. ICIN, Feb. 2001, pp. 207-12.
-
(2001)
Proc. ICIN
, pp. 207-212
-
-
Cui, W.1
Ko, H.2
An, S.3
-
28
-
-
0033294674
-
Efficient Scheduling of Variable-Length IP Packets on High-Speed Switches
-
Dec.
-
G. Nong, M. Hamdi, and K. Letaief, "Efficient Scheduling of Variable-Length IP Packets on High-Speed Switches," Proc. IEEE GLOBECOM, Dec. 1999, pp. 1407-11.
-
(1999)
Proc. IEEE GLOBECOM
, pp. 1407-1411
-
-
Nong, G.1
Hamdi, M.2
Letaief, K.3
-
29
-
-
0035013178
-
Packet Scheduling in Input-Queued Cell-Based Switches
-
M. Marsan et al., "Packet Scheduling in Input-Queued Cell-Based Switches," Proc. IEEE INFOCOM, 2001, pp. 1085-94.
-
(2001)
Proc. IEEE INFOCOM
, pp. 1085-1094
-
-
Marsan, M.1
-
30
-
-
0035684943
-
High-Performance Variable-Length Packet Scheduling Algorithm for IP Traffic
-
Nov.
-
S. Moon and D. Sung, "High-Performance Variable-Length Packet Scheduling Algorithm for IP Traffic," Proc. IEEE GLOBECOM, Nov. 2001, pp. 2666-70.
-
(2001)
Proc. IEEE GLOBECOM
, pp. 2666-2670
-
-
Moon, S.1
Sung, D.2
-
31
-
-
0033349686
-
A Starvation-Free Algorithm for Achieving 100 percent Throughput in an Input-Queued Switch
-
Aug.
-
A. Mekkittikul and N. McKeown, "A Starvation-Free Algorithm for Achieving 100 percent Throughput in an Input-Queued Switch," IEEE Trans. Commun., vol.47, no.8, Aug. 1999, pp. 1260-67.
-
(1999)
IEEE Trans. Commun.
, vol.47
, Issue.8
, pp. 1260-1267
-
-
Mekkittikul, A.1
McKeown, N.2
-
32
-
-
61849160463
-
Providing Bandwidth Guarantees in an Input-Buffered Crossbar Switch
-
Apr.
-
D. Stilladis and A. Varma, "Providing Bandwidth Guarantees in an Input-Buffered Crossbar Switch," Proc. IEEE INFOCOM, Apr. 1995, pp. 960-68.
-
(1995)
Proc. IEEE INFOCOM
, pp. 960-968
-
-
Stilladis, D.1
Varma, A.2
|