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Volumn 48, Issue 2, 2004, Pages 271-276

Electrical overstress in AlGaN/GaN HEMTs: Study of degradation processes

Author keywords

Device degradation; Electrical overstress and electrostatic discharge; GaN HEMT

Indexed keywords

CARRIER CONCENTRATION; ELECTRIC POTENTIAL; GALLIUM NITRIDE; INTERFEROMETRY; SEMICONDUCTING ALUMINUM COMPOUNDS;

EID: 0242303624     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(03)00295-8     Document Type: Article
Times cited : (28)

References (13)
  • 2
    • 0028425838 scopus 로고
    • Surface technology and ESD protection: Towards highly reliable GaAs microwave circuits
    • Bock K., Hartnagel H.L. Surface technology and ESD protection: towards highly reliable GaAs microwave circuits. Semicond. Sci. Technol. 9:1994;1005-1015.
    • (1994) Semicond. Sci. Technol. , vol.9 , pp. 1005-1015
    • Bock, K.1    Hartnagel, H.L.2
  • 4
    • 0030274036 scopus 로고    scopus 로고
    • Characterisation of reliability of compound semiconductor devices using electrical pulses
    • Brandt M., Krozer V., Schüssler M., Bock K., Hartnagel H. Characterisation of reliability of compound semiconductor devices using electrical pulses. Microelectron. Reliab. 36(11/12):1996;1891-1894.
    • (1996) Microelectron. Reliab. , vol.36 , Issue.11-12 , pp. 1891-1894
    • Brandt, M.1    Krozer, V.2    Schüssler, M.3    Bock, K.4    Hartnagel, H.5
  • 8
    • 0030167484 scopus 로고    scopus 로고
    • Current instability and burnout of HEMT structures
    • Vashchenko V.A., Sinkevitch V.F. Current instability and burnout of HEMT structures. Solid-State Electron. 39(6):1996;851-856.
    • (1996) Solid-state Electron. , vol.39 , Issue.6 , pp. 851-856
    • Vashchenko, V.A.1    Sinkevitch, V.F.2
  • 11
    • 0034245579 scopus 로고    scopus 로고
    • Interferometric temperature mapping during ESD stress and failure analysis of smart power technology ESD protection devices
    • Fürböck C., Pogany D., Litzenberger M., Gornik E., Seliger N., Gossner H.et al. Interferometric temperature mapping during ESD stress and failure analysis of smart power technology ESD protection devices. J. Electrostat. 49:2000;195-213.
    • (2000) J. Electrostat. , vol.49 , pp. 195-213
    • Fürböck, C.1    Pogany, D.2    Litzenberger, M.3    Gornik, E.4    Seliger, N.5    Gossner, H.6
  • 12
    • 0036866034 scopus 로고    scopus 로고
    • Quantitative internal thermal energy mapping of semiconductor devices under short current stress using backside laser interferometry
    • Pogany D., Bychikhin S., Fürböck C., Litzenberger M., Gornik E., Groos G.et al. Quantitative internal thermal energy mapping of semiconductor devices under short current stress using backside laser interferometry. IEEE Trans. Electron Dev. 49(11):2002;2070-2079.
    • (2002) IEEE Trans. Electron Dev. , vol.49 , Issue.11 , pp. 2070-2079
    • Pogany, D.1    Bychikhin, S.2    Fürböck, C.3    Litzenberger, M.4    Gornik, E.5    Groos, G.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.