Interferometric temperature mapping during ESD stress and failure analysis of smart power technology ESD protection devices

Journal of Electrostatics

Volumn 49, Issue 3-4, 2000, Pages 195-213

  Furbock C ^a   Pogany, D ^a   Litzenberger, M ^a   Gornik, E ^a   Seliger, N ^b   Gossner H ^c   Muller Lynch T ^c   Stecher, M ^c   Werner, W ^c  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b SIEMENS AG   (Germany)

^c INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

ESD stress; Failure analysis; Interferometric laser probe; Smart power technology; Temperature mapping; Transient temperature measurement

Indexed keywords

BIPOLAR TRANSISTORS; COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC DISCHARGES; ELECTRIC EQUIPMENT PROTECTION; FAILURE ANALYSIS; INTERFEROMETRY; LASER APPLICATIONS; PHASE SHIFT; POWER INTEGRATED CIRCUITS; TEMPERATURE DISTRIBUTION; TEMPERATURE MEASUREMENT;

AVALANCHE MULTIPLICATION; ELECTROSTATIC DISCHARGE DAMAGE; ELECTROSTATIC DISCHARGE STRESS; LASER INTERFEROMETRIC TECHNIQUE; TEMPERATURE MAPPING;

ELECTROSTATIC DEVICES;

EID: 0034245579     PISSN: 03043886     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0304-3886(00)00024-3     Document Type: Article

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