Noise contribution in a fully integrated 1-V, 2.5GHz LNA in CMOS-SOI technology

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 2001, Pages 1611-1614

  Tinella, C ^a   Fournier, J M ^a   Haidar, J ^a  

^a CNRS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESSS; COMMON SOURCE; FULLY INTEGRATED; INDUCTIVE DEGENERATION; INTEGRATED INDUCTORS; NOISE CONTRIBUTIONS; PARASITIC ELEMENT; PARTIALLY DEPLETED SOI; SERIES RESISTOR; SIMULATED RESULTS; SINGLE-ENDED; SOI TECHNOLOGY; TRANSISTOR NOISE;

CMOS INTEGRATED CIRCUITS; NOISE FIGURE; SILICON ON INSULATOR TECHNOLOGY;

LOW NOISE AMPLIFIERS;

EID: 0042352885     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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