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Volumn 13, Issue 2 I, 2003, Pages 441-445

Design and component test of a tiny processor based on the SFQ technology

Author keywords

Binary decision diagram; Bit serial architecture; RSFQ; SFQ processor

Indexed keywords

BINARY CODES; COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; DEMULTIPLEXING; FREQUENCIES; JOSEPHSON JUNCTION DEVICES; MICROPROCESSOR CHIPS; QUANTUM THEORY;

EID: 0041975876     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2003.813892     Document Type: Conference Paper
Times cited : (30)

References (14)
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  • 4
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    • Superconductor electronic devices for petaflops computing
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    • M. Dorojevets, P. Bunyk, D. Zinoviev, and K. K. Likharev, "Superconductor electronic devices for petaflops computing," FED Journal, vol. 10, pp. 3-14, March 1999.
    • (1999) FED Journal , vol.10 , pp. 3-14
    • Dorojevets, M.1    Bunyk, P.2    Zinoviev, D.3    Likharev, K.K.4
  • 5
    • 0036505091 scopus 로고    scopus 로고
    • High-end server based on complexity-reduced architecture for superconductor technology
    • A. Fujimaki, Y. Takai, and N. Yoshikawa, "High-End server based on complexity-reduced architecture for superconductor technology," IEICE Transactions on Electronics, vol. E85-C, no. 3, pp. 612-616, 2002.
    • (2002) IEICE Transactions on Electronics , vol.E85-C , Issue.3 , pp. 612-616
    • Fujimaki, A.1    Takai, Y.2    Yoshikawa, N.3
  • 6
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    • Design of small RSFQ microprocessor based on cell-based top-down design methodology
    • March
    • F. Matsuzaki, K. Yoda, J. Koshiyama, K. Motoori, and N. Yoshikawa, "Design of small RSFQ microprocessor based on cell-based top-down design methodology," IEICE Trans. Electron., vol. E85-C, pp. 659-664, March 2002.
    • (2002) IEICE Trans. Electron. , vol.E85-C , pp. 659-664
    • Matsuzaki, F.1    Yoda, K.2    Koshiyama, J.3    Motoori, K.4    Yoshikawa, N.5
  • 7
    • 0036787363 scopus 로고    scopus 로고
    • Design and component test of a 1-bit RSFQ microprocessor
    • N. Yoshikawa, F. Matsuzaki, N. Nakajima, and K. Yoda, "Design and component test of a 1-bit RSFQ microprocessor," Physica C, vol. 378-381, pp. 1454-1460, 2002.
    • (2002) Physica C , vol.378-381 , pp. 1454-1460
    • Yoshikawa, N.1    Matsuzaki, F.2    Nakajima, N.3    Yoda, K.4
  • 9
    • 0035268109 scopus 로고    scopus 로고
    • Top-down RSFQ logic design based on a binary decision diagram
    • March
    • N. Yoshikawa and J. Koshiyama, "Top-Down RSFQ logic design based on a binary decision diagram," IEEE Trans. Appl. Superconductivity, vol. 11, pp. 1098-1101, March 2001.
    • (2001) IEEE Trans. Appl. Superconductivity , vol.11 , pp. 1098-1101
    • Yoshikawa, N.1    Koshiyama, J.2
  • 10
    • 0042756630 scopus 로고    scopus 로고
    • A cell-based design apploach for RSFQ circuits using binary decision diagram
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  • 11
    • 0043257772 scopus 로고    scopus 로고
    • BDD SFQ Cell library. [Online]
    • BDD SFQ Cell library. [Online], Available: http://www.yoshilab.dnj.ynu.ac.jp/download/download.html
  • 13
    • 0004362239 scopus 로고    scopus 로고
    • Timing design of RSFQ circuits using verflog HDL
    • N. Yoshikawa, A. Mori, and J. Koshiyama, "Timing design of RSFQ circuits using verflog HDL," Trans. of IEICE, vol. J83-C, pp. 643-650, 2000.
    • (2000) Trans. of IEICE , vol.J83-C , pp. 643-650
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.