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Volumn , Issue , 2001, Pages 86-95

Synchronous handshake circuits

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS DESIGN; BEHAVIORAL LEVEL; CLOCK GATING TECHNIQUES; DESIGN FLOWS; FLOW BASED; HANDSHAKE CIRCUITS; PERFORMANCE; POWER;

EID: 0041716679     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2001.914072     Document Type: Conference Paper
Times cited : (21)

References (18)
  • 7
    • 0015995299 scopus 로고
    • Towards a theory of universal speed-independent modules
    • Jan.
    • R. M. Keller. Towards a theory of universal speed-independent modules. IEEE Transactions on Computers, C-23(1):21-33, Jan. 1974.
    • (1974) IEEE Transactions on Computers , vol.C-23 , Issue.1 , pp. 21-33
    • Keller, R.M.1
  • 12
    • 0002230692 scopus 로고
    • Compiling occam into FPGAs
    • W. Moore and W. Luk, eds
    • I. Page and W. Luk. Compiling Occam into FPGAs. In W. Moore and W. Luk, eds, FPGAs, pages 271-283, 1991.
    • (1991) FPGAs , pp. 271-283
    • Page, I.1    Luk, W.2
  • 13
    • 0003418582 scopus 로고    scopus 로고
    • PhD thesis, Eindhoven University of Technology, June
    • A. M. G. Peeters. Single-Rail Handshake Circuits. PhD thesis, Eindhoven University of Technology, June 1996. http://www.win.tue.nl/~wsinap/pdf/ Peeters96.pdf.
    • (1996) Single-Rail Handshake Circuits
    • Peeters, A.M.G.1
  • 16
    • 0001951703 scopus 로고
    • System timing
    • C. A. Mead and L. A. Conway, editors chapter 7. Addison-Wesley
    • C. L. Seitz. System timing. In C. A. Mead and L. A. Conway, editors, Introduction to VLSI Systems, chapter 7. Addison-Wesley, 1980.
    • (1980) Introduction to VLSI Systems
    • Seitz, C.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.