메뉴 건너뛰기




Volumn , Issue , 1996, Pages 122-133

Single-track handshake signaling with application to micropipelines and handshake circuits

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; ECONOMIC AND SOCIAL EFFECTS; TIMING CIRCUITS;

EID: 84855230772     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.1996.494444     Document Type: Conference Paper
Times cited : (47)

References (11)
  • 1
    • 0001158270 scopus 로고
    • Investigation into micropipeline latch design styles
    • June
    • Paul Day and J. Viv Woods. Investigation into micropipeline latch design styles. IEEE Transactions on VLSI Systems, 3(2):264-272, June 1995.
    • (1995) IEEE Transactions on VLSI Systems , vol.3 , Issue.2 , pp. 264-272
    • Day, P.1    Viv-Woods, J.2
  • 3
    • 0002927123 scopus 로고
    • Programming in VLSI: From communicating processes to delay-insensitive circuits
    • C.A.R. Hoare, editor, Addison-Wesley
    • Alain J. Martin. Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits. In C.A.R. Hoare, editor, UT Year of Programming; Institute on Concurrent Programming, pages 351-373. Addison-Wesley, 1989.
    • (1989) UT Year of Programming; Institute on Concurrent Programming , pp. 351-373
    • Martin, A.J.1
  • 5
    • 85069221905 scopus 로고
    • Japanese Patent (NEC Corp.), public disclosure 62-95654, May 2
    • Jun Sato. Transmission System for Asynchronous Data. Japanese Patent (NEC Corp.), public disclosure 62-95654, May 2, 1987.
    • (1987) Transmission System for Asynchronous Data
    • Sato, J.1
  • 8
    • 0003721039 scopus 로고
    • Handshake circuits. An asynchronous architecture for VLSI programming
    • Cambridge University Press
    • Kees van Berkel. Handshake Circuits. An asynchronous architecture for VLSI programming. International Series on Parallel Computation 5. Cambridge University Press, 1993.
    • (1993) International Series on Parallel Computation 5
    • Van-Berkel, K.1
  • 9
    • 33646916387 scopus 로고
    • VLSI programming of a modulo-N counter with constant response time and constant power
    • S. Furber and M. Edwards, editors, Elsevier Science Publ. B.V
    • Kees van Berkel. VLSI programming of a modulo- N counter with constant response time and constant power. In S. Furber and M. Edwards, editors, Proc. Asynchronous Design Methodologies, Manchester, pages 1-11. Elsevier Science Publ. B.V., 1993.
    • (1993) Proc. Asynchronous Design Methodologies, Manchester , pp. 1-11
    • Van-Berkel, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.