The influence of Sn-Cu-Ni(Au) and Sn-Au intermetallic compounds on the solder joint reliability of flip chips on low temperature co-fired ceramic substrates

Microelectronics Reliability

Volumn 43, Issue 8, 2003, Pages 1317-1327

  Duan, N ^a   Scheer, J ^a   Bielen, J ^a,b   Van Kleef, M ^a,b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

AGING OF MATERIALS; CERAMIC MATERIALS; CHIP SCALE PACKAGES; GOLD; LOW TEMPERATURE EFFECTS; SOLDERED JOINTS; SOLDERING ALLOYS; SURFACE PROPERTIES; TIN ALLOYS;

AGING CONDITIONS;

INTERMETALLICS;

EID: 0041663587     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(03)00135-5     Document Type: Conference Paper

References (15)

1. Michaelides S., Sitaraman S.K. Die cracking and reliable die design for flip-chip assemblies. IEEE Trans. Adv. Packaging. 22:1999;602-613.
2. Zhang J, Skinner J, Szczech J, Gamota D. Ultra-thin flip chip on board assembly. In: Proc. Surface Mount Technology Association, SMTA 2000, Chicago, IL, September 2000.
3. Lau H.L., Lee S.W.R., Chang C. Effects of underfill material properties on the reliability of solder bumped flip chip on board with imperfect underfill encapsulants. Trans. Adv. Packaging. 23:2000;323-333.
4. Alander T., Heino P., Ristolaninen E. Solder bump reliability: issues on bump layout. IEEE Trans. Adv. Packaging. 23:2000;715-720.
5. Pang J.H., Chong D.Y.R., Low T.H. Thermal cycling analysis of flip-chip solder joint reliability. IEEE Trans. Components Packaging Technol. 24:2001;705-712.
6. Drexler E.S. Reliability of a flip-chip package thermally loaded between -55 °C and 125 °C. J. Electron. Mater. 28:1999;1150-1157.
7. Scheer J, Duan N, van Os K. Flip chip on LTCC: an investigation on thermal-mechanical failure modes. Philips Internal Report, 2003.
8. Stepniak F. Conversion of the under bump metallurgy into intermetallic compounds: the impact on flip chip reliability. Microelectron. Reliab. 41:2001;735-744.
9. Balkan H, Patterson D, Burgess G, Carlson C, et al. Flip-chip reliability: comparative characterization of lead free (Sn/Ag/Cu) and 63Sn/Pb eutectic solder. In: Proc 52nd Electronic Components and Technology Conference, ECTC 2002, San Diego, CA, May 2002. p. 1263-9.
10. Dasgupta A. Durability characterization of lead-free solders. CALCE Internal Report, 2002.
11. Massalski T.B. Binary alloy phase diagrams. 1987;315-317 American Society for Metals.
12. Harper C.A. Electronic packaging & interconnection handbook. 2nd ed. 1997;McGraw-Hill Publishers, New York. p. 5.50-2.
13. Lau J.H. Flip chip technologies. 1996;McGraw-Hill Publishers, New York. p. 451.
14. Oberndorff P. Lead-free solder systems. PhD thesis, Technical University of Eindhoven, 2001. p. 61-70.
15. Karlsen O.B., Kjekshus A., Rost E. The ternary system Au-Cu-Sn. Acta Chem Scand. 46:1992;147-156.