1.4-W 50-Gbit/s InP HEMT 1:4 demultiplexer IC with a multi-phase clock architecture

IEEE MTT-S International Microwave Symposium Digest

Volumn 2, Issue , 2003, Pages 1181-1184

  Sano, Kimikazu ^a   Murata, Koichi ^a   Kitabayashi, Hiroto ^a   Sugitani, Suehiro ^a   Sugahara, Hirohiko ^a   Enoki, Takatomo ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DEMULTIPLEXING; ELECTRIC CLOCKS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUITS; TIME DIVISION MULTIPLEXING;

POWER CONSUMPTION;

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 0041591185     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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