Mapping of H.264 decoding on a multiprocessor architecture

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5022 II, Issue , 2003, Pages 707-718

  Van Der Tol, Erik B ^a   Jaspers, Egbert G T ^a   Gelderblom, Rob H ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Application mapping; Data partitioning; H.264; H.26L; Hardware software co design; Media processing architecture; Multiprocessor architecture

Indexed keywords

CACHE MEMORY; COMPUTER SOFTWARE; DYNAMIC RANDOM ACCESS STORAGE; IMAGE CODING; IMAGE COMPRESSION; INTERCONNECTION NETWORKS; MULTIPROCESSING SYSTEMS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

APPLICATION MAPPING; DATA PARTITIONING; HARDWARE-SOFTWARE CO-DESIGN; MEDIA PROCESSING ARCHITECTURE; MULTIPROCESSOR ARCHITECTURE;

DECODING;

EID: 0041561088     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.476234     Document Type: Conference Paper

References (12)

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