A 40-43Gb/s clock and data recovery IC with integrated SFI-5 1:16 demultiplexer in SiGe technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages

  Ong, Adrian ^a   Benyamin, Saied ^a   Condito, Vincent ^a   Lee, Qinghung ^a   Mattia, John Paul ^a   Shaeffer, Derek K ^a   Shahani, Arvin ^a   Si, Xiaomin ^a   Tao, Hai ^a   Tarsia, Maurice ^a   Wong, Wayne ^a   Xu, Min ^a  

^a Big Bear Networks   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIT ERROR RATE; COMPARATOR CIRCUITS; DEMULTIPLEXING; ERROR CORRECTION; FLIP FLOP CIRCUITS; JITTER; MULTIPLEXING EQUIPMENT; SEMICONDUCTING SILICON COMPOUNDS; VARIABLE FREQUENCY OSCILLATORS;

CLOCK AND DATA RECOVERY INTEGRATED CIRCUITS; DEMULTIPLEXER; FORWARD ERROR CORRECTION;

INTEGRATED CIRCUITS;

EID: 0038645393     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. A. Joseph, et al., "A 0.18μm BiCMOS Technology Featuring 120/100GHz (ft/fmax) and ASIC-compatible CMOS Using Copper Interconnect," Proc. BCTM, pp. 143-146, 2001.
2. Optical Internetworking Forum, "SxI-5: Electrical Characteristics for 2.488 - 3.125Gbps Parallel Interfaces," Contribution oif2001.149.13, June 5, 2002.
3. M. Wurzer, et al., "A 40-Gb/s Integrated Clock and Data Recovery Circuit in a 50-GHz ft Silicon Bipolar Technology," J. Solid State Circuits, vol. 33, pp. 1320-1324, Sep., 1999.
4. M. Reinhold, et al., "A Fully Integrated 40-Gb/s Clock and Data Recovery IC With 1:4 DEMUX in SiGe Technology," J. Solid State Circuits, vol. 36, pp. 1937-1945, Dec. 2001.
5. R. Glidden, "Challenges and Opportunities for 40Gb/s Optical Transport PHY ICs in Si-based Processes," IEEE MTT-S International Microwave Symposium, Workshop Notes, Seattle, WA, Jun. 2-7, 2002.
6. G. Georgiou, "Clock and Data Recovery IC for 40-Gb/s Fiber-Optic Receiver," J. Solid State Circuits, pp. 1120-1124, Sep., 2002.
7. ITU-T G.8251, "The Control of Jitter and Wander Within the Optical Transport Network," Oct. 2001.