Detecting global stride locality in value streams

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2003, Pages 324-335

  Zhou, Huiyang ^a   Flanagan, Jill ^a   Conte, Thomas M ^a  

^a North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; MATHEMATICAL MODELS; PIPELINE PROCESSING SYSTEMS; REDUCED INSTRUCTION SET COMPUTING;

GLOBAL STRIDE INFORMATION; VALUE LOCALITY; VALUE PREDICTION;

MICROPROCESSOR CHIPS;

EID: 0038346225     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/859654.859656     Document Type: Conference Paper

References (31)

1. M. Bekerman, S. Jourdan, R. Ronen, G. Kirshenboim, L. Pappoport, A. Yoaz, and U. Weiser, "Correlated Load-Address Predictors", in International Symposium on Computer Architecture (ISCA-26), 1999.
2. J. T. Bodine, "Exploiting computational locality in global value histories", MS. Thesis, ECE Department, N. C. State University, 2002.
3. D. Burger and T. Austin, "The SimpleScalar tool set, v2.0," Computer Architecture News (ACM SIGARCH newsletter), vol. 25, June 1997.
4. M. Burtscher and B. G. Zorn, "Exploring last n value prediction," In International Conference on Parallel Architectures and Compilation Techniques (PACT'99), 1999.
5. B. Fields, S. Rubin, and R. Bodik, "Focusing processor policies via critical-path prediction", in International Symposium on Computer Architecture (ISCA-28), 2001.
6. C. Fu, M. D. Jennings, S. Y. Larin, and T. M. Conte, "Value speculation scheduling for high performance processors," In 8th International Conference on Architectural Support for Programming Language and Operation Systems (ASPLOS-8), 1998.
7. F. Gabbay and A. Mendelson, "Speculative execution based on value prediction," EE Department Tech Report 1080, Tachnion - Israel Institute of Technology, Nov. 1996.
8. F. Gabbay and A. Mendelson, "Can program profiling support value prediction?", in 30th International Symposium on Microarchitecture (MICRO-30), Nov. 1997.
9. B. Goeman, H. Vandierrndonck, and K. D. Bosschere, "Differential FCM: Increasing value prediction accuracy by improving table usage efficiency," in 7th International Symposium on High-Performance Computer Architecture (HPCA'01), Jan 2001.
10. E. Hao, P-Y Chang, and Y. Patt, "The effect of speculatively updating branch history on branch prediction accuracy, revisited", in 27th International Symposium on Microarchitecture (MICRO-27), 1994.
11. T. Heil, Z. Smith, and J. E. Smith, "Improving branch predictors by correlating on data values", in 32nd International Symposium on Microarchitecture (MICRO-32), 1999.
12. D. Jimenez and C. Lin, "Dynamic branch prediction with perceptrons", in 7th International Symposium on High Performance Computer Architecture (HPCA-7), 2001.
13. D. Joseph and D. Grunwald, "Prefetching using Markov Predictors", IEEE Transactions on Computers. Vol. 48, Feb. 1999.
14. E. Larson and T. Austin, "Compiler controlled value prediction using branch predictor based confidence", in 33rd International Symposium on Microarchitecture (MICRO-33), 2000.
15. S. Lee, Y. Wang, and P. Yew, "Decoupled value prediction on trace processors", in 6th International Symposium on High Performance Computer Architecture (HPCA-6), 2000.
16. S. Lee and P. Yew, "On some implementation issues for value prediction on wide ILP processors", in International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000.
17. M. H. Lipasti and J. P. Shen, "Exceeding the dataflow limit via value prediction," in 29th International Symposium on Microarchitecture (MICRO-29), 1996.
18. M.H. Lipasti, C. B. Wikerson, and J. P. Shen, "Value locality and load value prediction," in 7th International Conference on Architectural Support for Programming Language and Operation Systems (ASPLOS-7), Oct. 1996.
19. P. Marcuello, J. Tubella, and A. Gonzalez, "Value prediction for speculative multithreaded architectures," in 32nd International Symposium on Microarchitecture (MICRO-32), 1999.
20. T. Nakra, R. Gupta, and M. L. Soffa, "Global context-based value prediction," in 5th International Symposium on High Performance Computer Architecture (HPCA-5), 1999.
21. G. Reinman and B. Calder, "Predictive Techniques for aggressive local speculation", in 31st International Symposium on Microarchitecture (MICRO-31), 2000.
22. B. Rychlik, J. Faistl, B. Krug, and J. P. Shen, "Efficacy and performance impact of value prediction," in International Conference on Parallel Architectures and Compilation Techniques (PACT'98), 1998.
23. R. Sathe and M. Franklin, "Available parallelism with data value prediction", in High Performance Computing HiPC-5, 1998.
24. Y. Sazeides, "Modeling value prediction," in 8th International Symposium on High Performance Computer Architecture (HPCA-8), 2002.
25. Y. Sazeides and J. E. Smith, "The predictability of data values," in 30th International Symposium on Microarchitecture (MICRO-30), Nov. 1997
26. M. J. Serrano and Y. Wu, "Memory performance analysis of SPEC2000 for the Intel Itanium Processor", in 4th Workshop on Workload Characterization, 2001.
27. E. Sprangle and D. Carmean, "Increasing processor performance by implementing deeper pipelines", in 29th International Symposium on Computer Architecture (ISCA-29), 2002.
28. R. Thomas and M. Franklin, "Using dataflow based context for accurate value prediction", in International Conference on Parallel Architectures and Compilation Techniques (PACT'01), 2001.
29. E Tune, D. Liang, D. Tullsen, and B. Calder, "Dynamic prediction of critical instructions", in 7th International Symposium on High Performance Computer Architecture (HPCA-7), 2001.
30. K. Wang and M. Franklin, "Highly accurate data value prediction using hybrid predictors," in 30th International Symposium on Microarchitecture (MICRO-30), Nov. 1997.
31. Y. Wu, D. Chen, and J. Fang, "Better exploration of region-level value locality with integrated computation reuse and value prediction", in International Symposium on Computer Architecture (ISCA-28), 2001.