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The SimpleScalar Tool Set, Version 2.0
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D.C. Burger T. M. Austin The SimpleScalar Tool Set, Version 2.0 June 1997 1342 University of Wisconsin Computer Sciences
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(1997)
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85177124751
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Selective Value Prediction
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B. Calder G Reinman D. M. Tullsen Selective Value Prediction 26th International Symposium of Computer Architecture 26th International Symposium of Computer Architecture 1999-May
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(1999)
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Calder, B.1
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Tullsen, D.M.3
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Value Speculation Mechanisms for EPIC Architectures
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NC, Raleigh
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C. Fu T. M. Conte Value Speculation Mechanisms for EPIC Architectures October 1998 NC, Raleigh Dept. of Electrical and Computer Engineering, North Carolina State University
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(1998)
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Fu, C.1
Conte, T.M.2
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5
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0003914017
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Software-Only Value Speculation Scheduling
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NC, Raleigh
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C. Fu M. D. Jennings S. Y. Larin T. M. Conte Software-Only Value Speculation Scheduling June 1998 NC, Raleigh Dept. of Electrical and Computer Engineering, North Carolina State University
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(1998)
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Fu, C.1
Jennings, M.D.2
Larin, S.Y.3
Conte, T.M.4
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6
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85177122516
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Value Speculation Scheduling for High Performance Processors
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C. Fu M. D. Jennings S. Y. Larin T. M. Conte Value Speculation Scheduling for High Performance Processors 8th International Conference on Architectural Support for Programming Languages and Operating Systems 8th International Conference on Architectural Support for Programming Languages and Operating Systems 1998-October
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(1998)
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Fu, C.1
Jennings, M.D.2
Larin, S.Y.3
Conte, T.M.4
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85177107185
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Confidence Estimation for Speculation Control
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D. Grunwald A. Klauser S. Manne A. Pleskun Confidence Estimation for Speculation Control 25th International Symposium of Computer Architecture 25th International Symposium of Computer Architecture 1998-June
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(1998)
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Grunwald, D.1
Klauser, A.2
Manne, S.3
Pleskun, A.4
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Improving Value Prediction by Exploiting Both Operand and Output Value Locality
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J. Huang Y. Choi D. J. Lilja Improving Value Prediction by Exploiting Both Operand and Output Value Locality July 1999 ARCTiC 99-06
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Huang, J.1
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On the Value Locality of Store Instructions
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K. M. Lepak M. H. Lipasti On the Value Locality of Store Instructions 27th International Symposium of Computer Architecture 27th International Symposium of Computer Architecture 2000-June
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(2000)
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Lepak, K.M.1
Lipasti, M.H.2
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85177129596
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Exploiting Value Locality to Exceed the Dataflow Limit
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M. H. Lipasti J. P. Shen Exploiting Value Locality to Exceed the Dataflow Limit 29th International Symposium on Microarchitecture 29th International Symposium on Microarchitecture 1996-December
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Shen, J.P.2
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11
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85177140374
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The Performance Potential of Value and Dependence Prediction
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M. H. Lipasti J. P. Shen The Performance Potential of Value and Dependence Prediction EUROPAR-97 EUROPAR-97 1997-August
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12
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85177135787
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Decoupled Value Prediction on Trace Processors
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S. Lee Y. Wang P. Yew Decoupled Value Prediction on Trace Processors 6th International Symposium on High Performance Computer Architecture 6th International Symposium on High Performance Computer Architecture 2000-January
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(2000)
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Lee, S.1
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The Potential of Data Value Speculation to Boost ILP
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P. Marcuello A. Gonzalez The Potential of Data Value Speculation to Boost ILP 12th International Conference on Supercomputing 12th International Conference on Supercomputing 1998-July
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(1998)
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Gonzalez, A.2
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85177130448
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A Quantitative Assessment of Thread-Level Speculation Techniques
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P. Marcuello A. Gonzalez A Quantitative Assessment of Thread-Level Speculation Techniques 1st International Parallel and Distributed Processing Symposium 1st International Parallel and Distributed Processing Symposium 2000-May
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(2000)
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Marcuello, P.1
Gonzalez, A.2
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15
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0033349998
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Value Prediction for Speculative Multithreaded Architectures
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P. Marcuello J. Tubella A. Gonzalez Value Prediction for Speculative Multithreaded Architectures 32th International Symposium on Microarchitecture 32th International Symposium on Microarchitecture 1999-November
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(1999)
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Marcuello, P.1
Tubella, J.2
Gonzalez, A.3
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17
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85177109250
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Global Context-Based Value Prediction
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T. Nakra R. Gupta M. L. Soffa Global Context-Based Value Prediction 5th International Symposium on High Performance Computer Architecture 5th International Symposium on High Performance Computer Architecture 1999-January
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(1999)
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Nakra, T.1
Gupta, R.2
Soffa, M.L.3
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18
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85177133395
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Value Prediction in VLIW Machines
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T. Nakra R. Gupta M. L. Soffa Value Prediction in VLIW Machines 26th International Symposium on Computer Architecture 26th International Symposium on Computer Architecture 1999-May
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(1999)
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Nakra, T.1
Gupta, R.2
Soffa, M.L.3
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19
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85177106354
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The Predictability of Data Values
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Y. Sazeides J. E. Smith The Predictability of Data Values 30th International Symposium on Microarchitecture 30th International Symposium on Microarchitecture 1997-December
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(1997)
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Sazeides, Y.1
Smith, J.E.2
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20
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78149255691
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Dynamic Instruction Reuse
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A. Sodani G. Sohi Dynamic Instruction Reuse 24th International Symposium on Computer Architecture 24th International Symposium on Computer Architecture 1997-June
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(1997)
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Sodani, A.1
Sohi, G.2
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21
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85177127518
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Fast Out-Of-Order Processor Simulation Using Memoization
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E. Schnarr J. Larus Fast Out-Of-Order Processor Simulation Using Memoization 8th International Conference on Architectural Support for Programming Languages and Operating Systems 8th International Conference on Architectural Support for Programming Languages and Operating Systems 1998-October
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(1998)
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Larus, J.2
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22
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85177116404
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Load Latency Tolerance in Dynamically Scheduled Processors
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S. T. Srinivasan A. R. Lebeck Load Latency Tolerance in Dynamically Scheduled Processors 31st International Symposium on Microarchitecture 31st International Symposium on Microarchitecture 1998-December
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(1998)
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Srinivasan, S.T.1
Lebeck, A.R.2
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23
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85177116300
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Storageless Value Prediction Using Prior Register Values
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D. M. Tullsen J. S. Seng Storageless Value Prediction Using Prior Register Values 26th International Symposium on Computer Architecture 26th International Symposium on Computer Architecture 1999-May
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(1999)
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Tullsen, D.M.1
Seng, J.S.2
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24
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85177125352
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VTune™ Performance Analyzer Home Page http://developer.intel.com/vtune/analyzer/index.htm
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25
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85177138662
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Understanding the Backwards Slices of Performance Degrading Instructions
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C. B. Zilles G Sohi Understanding the Backwards Slices of Performance Degrading Instructions 27th International Symposium of Computer Architecture 27th International Symposium of Computer Architecture 2000-June
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(2000)
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Zilles, C.B.1
Sohi, G2
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