A 500-Mb/s soft-output Viterbi decoder

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 7, 2003, Pages 1234-1241

  Yeo, Engling ^a   Augsburger, Stephanie A ^b,c   Davis, W Rhett ^b,d   Nikolić, Borivoje ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c INTEL CORPORATION   (United States)

^d North Carolina State University   (United States)

Author keywords

Iterative decoders; Turbo codes; Viterbi decoder; VLSI

Indexed keywords

ALGORITHMS; CONVOLUTIONAL CODES; ITERATIVE METHODS; TURBO CODES; VLSI CIRCUITS;

ITERATIVE DECODERS;

DECODING;

EID: 0038155576     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.813250     Document Type: Article

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