Ultra low voltage, low power 4-2 compressor for high speed multiplications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2003, Pages

  Gu, Jiangmin ^a   Chang, Chip Hong ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPRESSORS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; LOGIC GATES;

LOW POWER COMPRESSORS;

MULTIPLYING CIRCUITS;

EID: 0038082044     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. D. Radhakrishnan and A. P. Preethy, "Low power CMOS pass logic 4-2 compressor for high-speed multiplication," in Proc. of the 43th IEEE Midwest Symposium on Circuits and Systems, vol. 3, pp. 1296-1298, 2000.
2. S. F Hsiao, M. R. Jiang and J. S. Yeh, "Design of high-speed low-power 3-2 counter and 4-2 compressor for fast multipliers," Electronics Letters, vol. 34, no. 4, pp. 341-343, 1998.
3. K. Prasad and K. K. Parhi, "Low-power 4-2 and 5-2 Compressors," in Proc. of the 35th Asilomar Conf. on Signals, Systems and Computers, vol.1, pp. 129-133, 2001.
4. M. Margala and N. G. Durdle, "Low-power low-voltage 4-2 compressors for VLSI applications," In Proc. IEEE Alessandro Volta Memorial Workshop on Low-Power Design, pp. 84-90, 1999.
5. A. M. Shams, T. K. Darwish and M. A. Bayoumi, "Performance analysis of low-power 1-bit CMOS full adder cells," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 10, no. 1, pp. 20-29, 2002.
6. H. T. Bui, Y. Wang and Y. Jiang. "Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates," IEEE Trans. on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, no. 1, pp. 25-30, 2002.
7. A. M. Shams and M. A. Bayoumi, "A structured approach for designing low power adders," in Proc. of the 31st Asilomar Conf. on Signals, Systems & Computers, vol. 1, pp. 757-761, 1997.
8. D. Radhakrishnan, "Low voltage CMOS full adder cells," Electronics Letters, vol. 35, pp. 1792-1794, 1999.