Wafer level forward current reliability analysis of 120GHz production SiGe HBTs under accelerated current stress

IEEE International Reliability Physics Symposium Proceedings

Volumn 2002-January, Issue , 2002, Pages 184-188

  Rieh, J S ^a   Watson, K ^b   Guarin, F ^a   Yang, Z ^a   Wang, P C ^a   Joseph, A ^b   Freeman, G ^a   Subbanna, S ^a  

^a IBM MICROELECTRONICS   (United States)

^b NONE   (United States)

Author keywords

Acceleration; Bipolar transistors; Degradation; Germanium silicon alloys; Mechanical factors; Production; Robustness; Silicon germanium; Stress; Temperature

Indexed keywords

ACCELERATION; BICMOS TECHNOLOGY; BIPOLAR TRANSISTORS; DEGRADATION; GERMANIUM; GERMANIUM ALLOYS; HETEROJUNCTION BIPOLAR TRANSISTORS; POLYCRYSTALLINE MATERIALS; POLYSILICON; PRODUCTION; RELIABILITY; ROBUSTNESS (CONTROL SYSTEMS); SILICON ALLOYS; SILICON WAFERS; SINGLE CRYSTALS; STRESSES; TEMPERATURE; THERMAL NOISE;

CATASTROPHIC FAILURES; DEVICE CHARACTERISTICS; GERMANIUM SILICON ALLOY; MECHANICAL FACTORS; MODERATE TEMPERATURE; POLYSILICON EMITTER BIPOLAR TRANSISTORS; SILICON GERMANIUM; WAFER LEVEL RELIABILITIES;

RELIABILITY ANALYSIS;

EID: 0037508178     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2002.996633     Document Type: Conference Paper

References (9)

1. max) HBT and ASIC-Compatible CMOS Using Copper Interconnect," Proc. BCTM, pp.143-146, 2001.
2. T SiGe Heterojunction Bipolar Transistor with a Non-Self-Aligned (NSA) Structure", IEEE Electron Device Lett., Vol.22, No.11. pp. 542-544, 2001.
3. M. Sokolich et al, "Submicron AlInAs/InGaAs HBT with 160 GHz f//T at 1 mA collector current, " IEEE Electron Device Lett., Vol 22, no. 1, pp. 8-10, 2001.
4. D. Sawdai et al, "High Performance, High Yield InP DHBT Production Process for 40 Gbps Applications," Proc. International Conference on Indium Phosphide and Related Materials, pp.493-496, 2001
5. T SiGe Technology", Proc. GaAs IC Symp., pp.89-92, 2001.
6. H. C. De Graaff et al, "The SIS tunnel emitter: A theory for emitters with thin interface layers," IEEE Transactions on Electron Devices., Vol. 26, No.11, pp. 1771-1776, 1979.
7. A. Eltoukhy et al, "The role of the interfacial layer in polysilicon emitter bipolar transistors," IEEE Transactions on Electron Devices., Vol. 29, No.12, pp. 1863-1869, 1982.
8. R. S. Hemmert et al, "The relationship among electromigration, passivation thickness, and common-emitter current gain degradation within shallow junction NPN bipolar transistors," Journal of Applied Physics, Vol. 53, No. 6, pp. 4456-4462, 1982.
9. J. -S. Rieh et al, "Measurement and modeling of thermal resistance of high speed SiGe heterojunction bipolar transistors," Proc. Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, pp. 110-113, 2001.