An empirical model for charge leakage through oxide-nitride-oxide interpoly dielectric in stacked-gate flash memory devices

Semiconductor Science and Technology

Volumn 18, Issue 2, 2003, Pages 158-162

  Kim, Jang Han ^a   Choi, Jung Bum ^a   Shin, Bong Jo ^a   Park, Keun Hyung ^a  

^a Chungbuk National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; FLASH MEMORY; GATES (TRANSISTOR); HIGH TEMPERATURE OPERATIONS; LEAKAGE CURRENTS; MATHEMATICAL MODELS; RELIABILITY;

VOLTAGE SHIFTS;

DIELECTRIC DEVICES;

EID: 0037322335     PISSN: 02681242     EISSN: None     Source Type: Journal    
DOI: 10.1088/0268-1242/18/2/317     Document Type: Article

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