Efficient residue to binary converter

IEE Proceedings: Computers and Digital Techniques

Volumn 150, Issue 1, 2003, Pages 11-16

  Hiasat, A A ^a  

^a PRINCESS SUMAYA UNIVERSITY FOR TECHNOLOGY   (Jordan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; FAST FOURIER TRANSFORMS; MULTIPLEXING; MULTIPLYING CIRCUITS; ROM;

RESIDUE NUMBER SYSTEM (RNS);

COMPUTER ARCHITECTURE;

EID: 0037285243     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20030060     Document Type: Conference Paper

References (11)

1. SZABO, N., and TANAKA, R.: 'Residue arithmetic and its applications to computer technology' (McGraw Hill, New York, 1967)
2. SODERSTRAND, M.A., JENKINS, W., JULLIEN, G., and TAYLOR, F., Residue number system arithmetic: modern applications in digital signal processing' (IEEE Press, New York, 1986)
3. k-1 - 1)', IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., 2000, 47, pp. 1576-1581
4. k-1 - 1)', IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. II, 1998, 45, pp. 204-209
5. PREMKUMAR, A.: 'An RNS to binary converter in a three moduli set with common factors', IEEE Trans. Circuits II Syst., Analog Digit. Signal Process., 1995, 42, pp. 298-301
6. SWEIDAN, A., and HIASAT, A.: 'New efficient memoryless, residue to binary converter', IEEE Trans. Circuits Syst., 1988, 35, pp. 1441-1444
7. CONWAY, R., and NELSON, J.: 'Fast converter for 3 moduli RNS using new property, of CRT', IEEE Trans. Comput., 1999, 48, pp. 852-860
8. VAN VU, T.: 'Efficient implementation of Chinese remainder theorem for sign detection and residue decoding', IEEE Trans. Comput., 1985, 34, pp. 646-651
9. POURBIGHARAZ, F., and YASSINE, H.: 'A signed-digit architecture for residue to binary transformation', IEEE Trans. Comput., 1997, 46, pp. 1146-1150
10. WANG, Y.: 'Residue-to-binary converters based on new Chinese remainder theorems', IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., 2000, 47, pp. 197-205
11. SKAVANTZOS, A.: 'An efficient residue to weighted converter for a new residue number system'. Proceedings of the 8th Great Lakes Symposium on VLSI, Lafayelle, LA, Feb. 1998, pp. 185-191