LVTSCR structures for latch-up free ESD protection of BiCMOS RF circuits

Microelectronics Reliability

Volumn 43, Issue 1, 2003, Pages 61-69

  Vashchenko, V ^a   Concannon, A ^a   Ter Beek, M ^a   Hopper, P ^a  

^a NSC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTRIC POTENTIAL; ELECTRIC RECTIFIERS; GROUND STATE;

ELECTROSTATIC DISCHARGE (ESD);

CMOS INTEGRATED CIRCUITS;

EID: 0037226523     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(02)00125-7     Document Type: Article

References (10)

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